ACM Transactions on Design Automation of Electronic Systems (TODAES) is part
of the family of journals produced by the ACM. SIGDA is our sponsoring organization. TODAES publishes one volume every year. Each volume is
comprised of four issues, which appear in January, April, July and October.
The average turnaround time (submission to first decision) is 12 weeks.
The TODAES editorial board invites submission of technical papers
describing recent results of research and development efforts in the
area of design automation of electronic systems. The journal
intends to provide a comprehensive coverage of innovative works
concerning the specification, design,
analysis, simulation, testing, and evaluation of very
large scale integrated electronic systems, emphasizing a computer
science/engineering orientation. Potential authors are encouraged
to consult the information for authors.
Please use http://mc.manuscriptcentral.com/todaes for new submissions, status of papers,
assignment of reviewers
and reviewing tasks. Please note, if you don't have an account at ACM
Manuscript Central you will need to create an account before you can log
in and submit to ACM TODAES.
ACM introduces a new publishing license agreement, an updated copyright transfer agreement,
and a new author-pays option which allows for perpetual open access through the ACM Digital
Library. For more information, visit the ACM Author Rights webpage.
Congratulations to Jason Cong, Bin Liu, Rupak Majumdar, and Zhiru Zhang on receiving the
2012 ACM TODAES Best Paper Award for their article titled
Behavior-Level Observability Analysis for Operation Gating in Low-Power Behavioral Synthesis, ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 16, Issue 1, Article 4, November 2010.
Related ACM Links
The article was chosen to receive the award for the following reasons:
The complete list of past award winners is available here.
- It is the first to formally generalize the concept of ODC in the behavior level. In addition, it presents an exact and efficient algorithm to compute the behavior-level ODC in the presence of black-box operations. Traditional (or logic) ODC based analysis can hardly derive high-level ODC information (esp. across clock boundaries) in complete and efficient manners.
- It is also the first to combine behavior-level ODC analysis with high-level synthesis (HLS) optimizations to identify and avoid unnecessary computations and data transfers.
- The proposed ODC-based optimizations have been integrated into a cutting-edge commercial HLS system (AutoESL/Xilinx), leading to significant power savings (30%+) for the synthesized circuits.
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