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ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 17 Issue 1, January 2012

Easy Formal Specification and Validation of Unbounded Networks-on-Chips Architectures
Freek Verbeek, Julien Schmaltz
Article No.: 1
DOI: 10.1145/2071356.2071357

This article presents a formal specification and validation environment to prove safety and liveness properties of parametric -- unbounded -- NoCs architectures described at a high-level of abstraction. The environment improves the GeNoC approach...

System-Level Synthesis for Wireless Sensor Node Controllers: A Complete Design Flow
Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys
Article No.: 2
DOI: 10.1145/2071356.2071358

Wireless sensor networks (WSN) is a new and very challenging research field for embedded system design automation. Engineering a WSN node hardware platform is known to be a tough challenge, as the design must enforce many severe constraints, among...

Optimization Algorithms for the Multiplierless Realization of Linear Transforms
Levent Aksoy, Eduardo Costa, Paulo Flores, Jose Monteiro
Article No.: 3
DOI: 10.1145/2071356.2071359

This article addresses the problem of finding the fewest numbers of addition and subtraction operations in the multiplication of a constant matrix with an input vector---a fundamental operation in many linear digital signal processing transforms....

Postplacement Voltage Island Generation
Mario K. Y. Leung, Eric K. I. Chio, Evangeline F. Y. Young
Article No.: 4
DOI: 10.1145/2071356.2071360

High power consumption will not only shorten the battery life of handheld devices, but also cause thermal and reliability problems. To lower power consumption, one way is to reduce the supply voltage as in multisupply voltage (MSV) designs. In...

Compact Modeling of Interconnect Circuits over Wide Frequency Band by Adaptive Complex-Valued Sampling Method
Hai Wang, Sheldon X.-D. Tan, Ryan Rakib
Article No.: 5
DOI: 10.1145/2071356.2071361

In this article, we propose a new model order-reduction method for compact modeling of interconnect circuits over wide frequency band using a novel complex-valued adaptive sampling and error estimation scheme. We address the outstanding error...

Reliability-Driven Power/Ground Routing for Analog ICs
Jing-Wei Lin, Tsung-Yi Ho, Iris Hui-Ru Jiang
Article No.: 6
DOI: 10.1145/2071356.2071362

Electromigration and voltage drop (IR-drop) are two major reliability issues in modern IC design. Electromigration gradually creates permanently open or short circuits due to excessive current densities; IR-drop causes insufficient power supply,...

Coverage-Directed Test Generation Automated by Machine Learning -- A Review
Charalambos Ioannides, Kerstin I. Eder
Article No.: 7
DOI: 10.1145/2071356.2071363

The increasing complexity and size of digital designs, in conjunction with the lack of a potent verification methodology that can effectively cope with this trend, continue to inspire engineers and academics in seeking ways to further automate...

Error Rate Estimation for Defective Circuits via Ones Counting
Zhaoliang Pan, Melvin A. Breuer
Article No.: 8
DOI: 10.1145/2071356.2071364

With VLSI circuit feature size scaling down, it is becoming more difficult and expensive to achieve a desired level of yield. Error-tolerance employs defective chips that occasionally produce erroneous yet acceptable results in targeted...

Statistical Soft Error Rate (SSER) Analysis for Scaled CMOS Designs
Huan-Kai Peng, Hsuan-Ming Huang, Yu-Hsin Kuo, Charles H.-P. Wen
Article No.: 9
DOI: 10.1145/2071356.2071365

This article re-examines the soft error effect caused by radiation-induced particles beyond the deep submicron regime. Considering the impact of process variations, voltage pulse widths of transient faults are found no longer monotonically...

A Fast Non-Monte-Carlo Yield Analysis and Optimization by Stochastic Orthogonal Polynomials
Fang Gong, Xuexin Liu, Hao Yu, Sheldon X. D. Tan, Junyan Ren, Lei He
Article No.: 10
DOI: 10.1145/2071356.2071366

Performance failure has become a significant threat to the reliability and robustness of analog circuits. In this article, we first develop an efficient non-Monte-Carlo (NMC) transient mismatch analysis, where transient response is represented by...