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ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 19 Issue 3, June 2014

SPMCloud: Towards the Single-Chip Embedded ScratchPad Memory-Based Storage Cloud
Luis Angel D. Bathen, Nikil D. Dutt
Article No.: 22
DOI: 10.1145/2611755

The era of cloud computing on-a-chip is enabled by the aggressive move towards many-core platforms and the rapid adoption of Network-on-Chips. As a result, there is a need for large-scale distributed on-chip shared memories that are reliable, low...

MAESTRO— Holistic Actor-Oriented Modeling of Nonfunctional Properties and Firmware Behavior for MPSoCs
Rafael Rosales, Michael Glass, Jürgen Teich, Bo Wang, Yang Xu, Ralph Hasholzner
Article No.: 23
DOI: 10.1145/2594481

Modeling and evaluating nonfunctional properties such as performance, power, and reliability of embedded systems are tasks of utmost importance. In this article, we introduce MAESTRO, a methodology for the modeling and evaluation of...

Integrated Coherence Prediction: Towards Efficient Cache Coherence on NoC-Based Multicore Architectures
Libo Huang, Zhiying Wang, Nong Xiao, Yongwen Wang, Qiang Dou
Article No.: 24
DOI: 10.1145/2611756

Multicore architectures with Network-on-Chips (NoCs) have been widely recognized as the de facto design for the efficient utilization of the continuously increasing density of transistors on a chip. A key challenge in designing such an NoC-based...

Garbage Collection for Multiversion Index in Flash-Based Embedded Databases
Po-Chun Huang, Yuan-Hao Chang, Kam-Yiu Lam, Jian-Tao Wang, Chien-Chin Huang
Article No.: 25
DOI: 10.1145/2611757

Recently, flash-based embedded databases have gained their momentum in various control and monitoring systems, such as cyber-physical systems (CPSes). To support the functionality to access the historical data, a multiversion index is adopted to...

Power Modeling for GPU Architectures Using McPAT
Jieun Lim, Nagesh B. Lakshminarayana, Hyesoon Kim, William Song, Sudhakar Yalamanchili, Wonyong Sung
Article No.: 26
DOI: 10.1145/2611758

Graphics Processing Units (GPUs) are very popular for both graphics and general-purpose applications. Since GPUs operate many processing units and manage multiple levels of memory hierarchy, they consume a significant amount of power. Although...

Diagnosability of Component-Composition Graphs in the MM* Model
Chia-Wei Lee, Sun-Yuan Hsieh
Article No.: 27
DOI: 10.1145/2611759

Diagnosability is an important metric for measuring the reliability of multiprocessor systems. This article adopts the MM* model and outlines the common properties of a wide class of interconnection networks, called component-composition...

Exact Logic and Fault Simulation in Presence of Unknowns
Dominik Erb, Michael A. Kochte, Matthias Sauer, Stefan Hillebrecht, Tobias Schubert, Hans-Joachim Wunderlich, Bernd Becker
Article No.: 28
DOI: 10.1145/2611760

Logic and fault simulation are essential techniques in electronic design automation. The accuracy of standard simulation algorithms is compromised by unknown or X-values. This results in a pessimistic overestimation of X-valued signals in the...

An Effective Floorplan-Guided Placement Algorithm for Large-Scale Mixed-Size Designs
Jackey Z. Yan, Natarajan Viswanathan, Chris Chu
Article No.: 29
DOI: 10.1145/2611761

In this article we propose an effective algorithm flow to handle modern large-scale mixed-size placement, both with and without geometry constraints. The basic idea is to use floorplanning to guide the placement of objects at the global level. The...

Integrated Resource Allocation and Binding in Clock Mesh Synthesis
Minseok Kang, Taewhan Kim
Article No.: 30
DOI: 10.1145/2611762

The clock distribution network in a synchronous digital circuit delivers a clock signal to every storage element, that is, clock sink in the circuit. However, since the continued technology scaling increases PVT (process-voltage-temperature)...

Incremental Analysis of Power Grids Using Backward Random Walks
Baktash Boghrati, Sachin S. Sapatnekar
Article No.: 31
DOI: 10.1145/2611763

Power grid design and analysis is a critical part of modern VLSI chip design and demands tools for accurate modeling and efficient analysis. The process of power grid design is inherently iterative, during which numerous small changes are made to...