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Design Automation of Electronic Systems (TODAES)

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ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 3 Issue 4, Oct. 1998

Modeling reactive systems in Java
C. Passerone, C. Sansoe, L. Lavagno, R. McGeer, J. Martin, R. Passerone, A. Sangiovanni-Vincentelli
Pages: 515-523
DOI: 10.1145/296333.296334
We present an application of the JavaTM programming language to specify and implement reactive real-time systems. We have developed and tested a collection of classes and methods to describe concurrent modules and their...

On measuring the effectiveness of various design validation approaches for PowerPC microprocessor embedded arrays
Li-C. Wang, Magdy S. Abadir, Jing Zeng
Pages: 524-532
DOI: 10.1145/296333.296335
Design validation for embedded arrays remains as a challenging problem in today's microprocessor design environment. At Somerset, validation of array designs relies on both formal verification and vector simulation. Although several methods for...

A timing-driven design and validation methodology for embedded real-time systems
Ali Dasdan, Dinesh Ramanathan, Rajesh K. Gupta
Pages: 533-553
DOI: 10.1145/296333.296338
We address the problem of timing constraint derivation and validation for reactive and real-time embedded systems. We assume that such a system is structured into its tasks, and the structure is modeled using a task graph. Our solution uses the...

ATM switch design by high-level modeling, formal verification and high-level synthesi
S. P. Rajan, M. Fujita, K. Yuan, M. T-C. Lee
Pages: 554-562
DOI: 10.1145/296333.296342
Asynchronous Transfer Mode (ATM) has emerged as a backbone for high-speed broadband telecommunication networks. In this paper, we present ATM switch design, starting from a parametric high-level model and debugging the model using a combination...

Specification and verification of pipelining in the ARM2 RISC microprocessor
James K. Huggins, David Van Campenhout
Pages: 563-580
DOI: 10.1145/296333.296345
Gurevich Abstract State Machines (ASMs) provide a sound mathematical basis for the specification and verification of systems. An application of the ASM methodology to the verification of a pipelined microprocessor (an ARM2 implementation) is...

High-level design verification of microprocessors via error modeling
D. Van Campenhout, H. Al-Asaad, J. P. Hayes, T. Mudge, R. B. Brown
Pages: 581-599
DOI: 10.1145/296333.296347
A design verification methodology for microprocessor hardware based on modeling design errors and generating simulation vectors for the modeled errors via physical fault testing techniques is presented. We have systematically collected design...

Efficient equivalence checking of multi-phase designs using phase abstraction and retiming
G. Hasteer, A. Mathur, P. Bannerjee
Pages: 600-625
DOI: 10.1145/296333.296348
Equivalence checking of finite state machines (FSMs) traditionally assumes single phase machines where a single clock (implicit or explicit) synchronizes the state of the FSM. We extend the equivalence checking paradignm to FSMs with multi-phase...

EXFI: a low-cost fault injection system for embedded microprocessor-based boards
A. Benso, P. Prinetto, M. Rebaudengo, M. Sonza Reorda
Pages: 626-634
DOI: 10.1145/296333.296351
Evaluating the faulty behavior of low-cost embedded microprocessor-based boards is an increasingly important issue, due to their adoption in many safety critical systems. The architecture of a complete Fault Injection environment is proposed,...