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HoPE: Hot-Cacheline Prediction for Dynamic Early Decompression in Compressed LLCs
Jaehyun Park, Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Vinson Young, Junghee Lee, Jongman Kim
Article No.: 40
Data compression plays a pivotal role in improving system performance and reducing energy consumption, because it increases the logical effective capacity of a compressed memory system without physically increasing the memory size. However, data...
PeaPaw: Performance and Energy-Aware Partitioning of Workload on Heterogeneous Platforms
Li Tang, Richard F. Barrett, Jeanine Cook, X. Sharon Hu
Article No.: 41
Performance and energy are two major concerns for application development on heterogeneous platforms. It is challenging for application developers to fully exploit the performance/energy potential of heterogeneous platforms. One reason is the lack...
CDTA: A Comprehensive Solution for Counterfeit Detection, Traceability, and Authentication in the IoT Supply Chain
Kun Yang, Domenic Forte, Mark M. Tehranipoor
Article No.: 42
The Internet of Things (IoT) is transforming the way we live and work by increasing the connectedness of people and things on a scale that was once unimaginable. However, the vulnerabilities in the IoT supply chain have raised serious concerns...
Generation of Transparent-Scan Sequences for Diagnosis of Scan Chain Faults
Article No.: 43
Diagnosis of scan chain faults is important for yield learning and improvement. Procedures that generate tests for diagnosis of scan chain faults produce scan-based tests with one or more functional capture cycles between a scan-in and a scan-out...
Application-Specific Residential Microgrid Design Methodology
Korosh Vatanparvar, Mohammad Abdullah Al Faruque
Article No.: 44
In power systems, the traditional, non-interactive, and manually controlled power grid has been transformed to a cyber-dominated smart grid. This cyber-physical integration has provided the smart grid with communication, monitoring, computation,...
Layer Assignment of Escape Buses with Consecutive Constraints in PCB Designs
Article No.: 45
It is important for cost and reliability consideration to minimize the number of the used layers in a PCB design. In this article, given a set of n circular escape buses with their escape directions between two adjacent components and a set...
Leak Stopper: An Actively Revitalized Snoop Filter Architecture with Effective Generation Control
Yin-Chi Peng, Chien-Chih Chen, Hsiang-Jen Tsai, Keng-Hao Yang, Pei-Zhe Huang, Shih-Chieh Chang, Wen-Ben Jone, Tien-Fu Chen
Article No.: 46
To alleviate high energy dissipation of unnecessary snooping accesses, snoop filters have been designed to reduce snoop lookups. These filters have the problem of decreasing filtering efficiency, and thus usually rely on partial or whole filter...
Topological Approach to Automatic Symbolic Macromodel Generation for Analog Integrated Circuits
Guoyong Shi, Hanbin Hu, Shuwen Deng
Article No.: 47
In the field of analog integrated circuit (IC) design, small-signal macromodels play indispensable roles for developing design insight and sizing reference. However, the subject of automatically generating symbolic low-order macromodels in human...
Recently, phase change memory (PCM) has been emerging as a strong replacement for DRAM owing to its many advantages such as nonvolatility, high capacity, low leakage power, and so on. However, PCM is still restricted for use as main memory because...
SSAGA: SMs Synthesized for Asymmetric GPGPU Applications
Shamik Saha, Prabal Basu, Chidhambaranathan Rajamanikkam, Aatreyi Bal, Koushik Chakraborty, Sanghamitra Roy
Article No.: 49
The emergence of GPGPU applications, bolstered by flexible GPU programming platforms, has created a tremendous challenge in maintaining high energy efficiency in modern GPUs. In this article, we demonstrate that customizing a Streaming...
We propose efficient algorithms to construct a low-power clock tree for through-silicon-via (TSV)-based 3D-ICs. We use shutdown gates to save clock trees’ dynamic power, which selectively turn off certain clock tree branches to avoid...
FinFETs have emerged as a promising replacement for planar CMOS devices in sub-20nm technology nodes. However, based on the temperature effect inversion (TEI) phenomenon observed in FinFET devices, the delay characteristics of FinFET circuits in...
The ARM CoreSight Program Trace Macrocell (PTM) has been widely deployed in recent ARM processors for real-time debugging and tracing of software. Using PTM, the external debugger can extract execution behaviors of applications running on an ARM...
Fundamental Challenges Toward Making the IoT a Reachable Reality: A Model-Centric Investigation
Yuankun Xue, Ji Li, Shahin Nazarian, Paul Bogdan
Article No.: 53
Constantly advancing integration capability is paving the way for the construction of the extremely large scale continuum of the Internet where entities or things from vastly varied domains are uniquely addressable and interacting seamlessly to...
Obfuscation-Based Protection Framework against Printed Circuit Boards Unauthorized Operation and Reverse Engineering
Zimu Guo, Jia Di, Mark M. Tehranipoor, Domenic Forte
Article No.: 54
Printed circuit boards (PCBs) are a basic necessity for all modern electronic systems but are becoming increasingly vulnerable to cloning, overproduction, tampering, and unauthorized operation. Most efforts to prevent such attacks have only...
A Fast Hierarchical Adaptive Analog Routing Algorithm Based on Integer Linear Programming
Mohammad Torabi, Lihong Zhang
Article No.: 55
The shrinking design window and high parasitic sensitivity in advanced technologies have imposed special challenges on analog and radio frequency (RF) integrated circuit design. The state-of-the-art analog routing research tends to favor linear...
A Single-Tier Virtual Queuing Memory Controller Architecture for Heterogeneous MPSoCs
Yang Song, Kambiz Samadi, Bill Lin
Article No.: 56
Heterogeneous MPSoCs typically integrate diverse cores, including application CPUs, GPUs, and HD coders. These cores commonly share an off-chip memory to save cost and energy, but their memory accesses often interfere with each other, leading to...
Accelerated Soft-Error-Rate (SER) Estimation for Combinational and Sequential Circuits
Ji Li, Jeffrey Draper
Article No.: 57
Radiation-induced soft errors have posed an increasing reliability challenge to combinational and sequential circuits in advanced CMOS technologies. Therefore, it is imperative to devise fast, accurate and scalable soft error rate (SER) estimation...