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ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 4 Issue 2, April 1999

Formal verification in hardware design: a survey
Christoph Kern, Mark R. Greenstreet
Pages: 123-193
DOI: 10.1145/307988.307989
In recent years, formal methods have emerged as an alternative approach to ensuring the quality and correctness of hardware designs, overcoming some of the limitations of traditional validation techniques such as simulation and testing....

BIFEST: a built-in intermediate fault effect sensing and test generation system for CMOS bridging faults
Kuen-Jong Lee, Jing-Jou Tang, Tsung-Chu Huang
Pages: 194-218
DOI: 10.1145/307988.307992
This paper presents BIFEST, an ATPG system that employs the built-in intermediate voltage test technique in an efficient ATPG process to deal with CMOS bridging faults. Fast and accurate calculations of the intermediate bridging voltages and the...

Behavioral synthesis of combinational logic using spectral-based heuristics
M. A. Thornton, V. S. S. Nair
Pages: 219-230
DOI: 10.1145/307988.308000
A prototype system developed to convert a behavioral representation of a Boolean function in OBDD form into an initial structural representation is described and experimental results are given. The system produces a multilevel circuit using...