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ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 5 Issue 2, April 2000

System-level power optimization: techniques and tools
Luca Benini, Giovanni de Micheli
Pages: 115-192
DOI: 10.1145/335043.335044
This tutorial surveys design methods for energy-efficient system-level design. We consider electronic sytems consisting of a hardware platform and software layers. We consider the three major constituents of hardware that consume energy, namely...

Structural gate decomposition for depth-optimal technology mapping in LUT-based FPGA designs
Jason Cong, Yean-Yow Hwang
Pages: 193-225
DOI: 10.1145/335043.335045
In this paper we study structural gate decomposition in general, simple gate networks for depth-optimal technology mapping using K-input Lookup-Tables (K-LUTs). We show that (1) structural gate decomposition in...

A predictive system shutdown method for energy saving of event-driven computation
Chi-Hong Hwang, Allen C.-H. Wu
Pages: 226-241
DOI: 10.1145/335043.335046
This paper presents a system-level power management technique for energy savings of event-driven application. We present a new predictive system-shutdown method to exploit sleep mode operations for energy saving. We use an exponential-average...

Simultaneous reference allocation in code generation for dual data memory bank ASIPs
Ashok Sudarsanam, Sharad Malik
Pages: 242-264
DOI: 10.1145/335043.335047
We address the problem of code generation for DSP systems on a chip. In such systems, the amount of silicon devoted of program ROM is limited, so application software must be sufficiently dense. Additionally, the software must be written so as...