ACM DL

Design Automation of Electronic Systems (TODAES)

Menu

Search Issue
enter search term and/or author name

Archive


ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 5 Issue 4, Oct. 2000

Guest Editorial
Peter Marwedel
Pages: 749-751
DOI: 10.1145/362652.362654

Code size minimization and retargetable assembly for custom EPIC and VLIW instruction formats
Shail Aditya, Scott A. Mahlke, B. Ramakrishna Rau
Pages: 752-773
DOI: 10.1145/362652.362658
PICO is a fully automated system for designing the architecture and the microarchitecture of VLIW and EPIC processors. A serious concern with this class of processors, due to their very long instructions, is their code size. One focus of this...

Constraint analysis for code generation: basic techniques and applications in FACTS
Koen Van Eijk, Bart Mesman, Carlos A. Alba Pinto, Qin Zhao, Marco Bekooij, Jef Van Meerbergen, Jochen Jess
Pages: 774-793
DOI: 10.1145/362652.362660
Code generation methods for digital signal processors are increasingly hampered by the combination of tight timing constraints imposed by signal p processing applications and resource constraints implied by the processor architecture. In...

Graph-based code selection techniques for embedded processors
Rainer LEUPERS Leupers, Steven Bashford
Pages: 794-814
DOI: 10.1145/362652.362661
Code selection is an important task in code generation for programmable processors, where the goal is to find an efficient mapping of machine-independent intermediate code to processor-specific machine instructions. Traditional approaches to...

Retargetable compiled simulation of embedded processors using a machine description language
Stefan Pees, Andreas Hoffmann, Heinrich Meyr
Pages: 815-834
DOI: 10.1145/362652.362662
Fast processor simulators are needed for the software development of embedded processors, for HW/SW cosimulation systems, and for profiling and design of application-specific processors. Such fast simulators can be generated based on the machine...