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ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 8 Issue 3, July 2003

On the hardware-software partitioning problem: System modeling and partitioning techniques
Marisa López-Vallejo, Juan Carlos López
Pages: 269-297
DOI: 10.1145/785411.785412
This paper presents an in-depth study of several system partitioning procedures. It is based on the appropriate formulation of a general system model, being therefore independent of either the particular co-design problem or the specific partitioning...

Gravity: Fast placement for 3-D VLSI
Stefan Thomas Obenaus, Ted H. Szymanski
Pages: 298-315
DOI: 10.1145/785411.785413
Three dimensional integration is an increasingly feasible method of implementing complex circuitry. For large circuits, which most benefit from 3-D designs, efficient placement algorithms with low time complexity are required.We present an iterative...

Congestion reduction during placement with provably good approximation bound
X. Yang, M. Wang, R. Kastner, S. Ghiasi, M. Sarrafzadeh
Pages: 316-333
DOI: 10.1145/785411.785414
This paper presents a novel method to reduce routing congestion during placement stage. The proposed approach is used as a post-processing step in placement. Congestion reduction is based on local improvement on the existing layout. However, the...

Synthesis of saturation arithmetic architectures
G. A. Constantinides, P. Y. K. Cheung, W. Luk
Pages: 334-354
DOI: 10.1145/785411.785415
This paper describes a synthesis technique for automating the design of linear Digital Signal Processing (DSP) systems such as digital filters. The proposed methodology makes optimized use of saturation arithmetic to produce a small design...

Constraints-driven scheduling and resource assignment
Krzysztof Kuchcinski
Pages: 355-383
DOI: 10.1145/785411.785416
This paper describes a new method for modeling and solving different scheduling and resource assignment problems that are common in high-level synthesis (HLS) and system-level synthesis. It addresses assignment of resources for operations and tasks...

Address code generation for DSP instruction-set architectures
J.-Y. Lee, I.-C. Park
Pages: 384-395
DOI: 10.1145/785411.785417
This paper presents a new DSP-oriented code optimization method to enhance performance by exploiting the specific architectural features of digital signal processors. In the proposed method, a source code is translated into the static single...