Massoud Pedram
			Department of Electrical Engineering University of Southern California EEB 344, 3740 McClintock Ave, Los Angeles CA 90089-2562 , USA Tel: +1 213 740-4458 Fax: +1 213 740-9803 Email: pedram@usc.edu http://atrak.usc.edu/~massoud

System-Level Synthesis, SoC design, and Networks on Chip

	Radu Marculescu
			Dept. of Electrical and Computer Engineering Carnegie Mellon University Hamerschlag Hall 2108, Pittsburgh, PA 15213-3890, USA Tel: +1 (412) 268-8710 Fax: +1 (412) 268-3204 Email: radum@ece.cmu.edu http://www.ece.cmu.edu/~sld Areas of interest: System-level Synthesis and Optimization, Emerging Applications and Design Methodologies

	Kees Goossens
			NXP Semiconductors and Technical University Delft Delft University of Technology, HB16.260, Mekelweg 4, 2628 CD Delft Tel: +31-40-27-29810 Fax: +31-15-27-87354 Email: kees.goossens@nxp.com http://homepages.inf.ed.ac.uk/kgoossen/ Areas of interest: Networks on chip, SOC design, real-time systems, (system-level) low power.

Embedded Systems and Software Design

	Nagarajan Ranganathan
			Dept. of Computer Science and Engineering University of South Florida ENB 118, Tampa, FL 33620 USA Tel: +1 (813) 974-4760 Fax: +1 (813) 974-5456 Email: ranganat@cse.usf.edu http://www.csee.usf.edu/~ranganat/ Areas of interest: High-Level Synthesis (datapath/control synthesis and optimization), System Design (hardware description languages, design systems and databases, embedded systems, hardware/software co-design).

	Soonhoi Ha
			School of Computer Science and Engineering Seoul National University Sinlim-dong, Gwanak-gu, Seoul 151-742, Korea Tel: +82-2-880-8382 Fax: +82-2-879-1532 Email: sha@snu.ac.kr http://iris.snu.ac.kr/sha/ Areas of interest: System Design (embedded systems, hardware/software codesign)

Real-Time Systems, Information Security and Trust in Embedded Systems

	Xiaobo Sharon Hu
			Dept. of Computer Science and Engineering University of Notre Dame Notre Dame, IN 46556, USA Tel: +1-(574) 631-6015 Fax: +1-(574) 631-9260 Email: hu@cse.nd.edu http://www.cse.nd.edu/~shu Areas of interest: Hardware/Software Codesign, Real-time Systems, Power/energy-aware Design

	Anand Raghunathan
			School of Electrical and Computer Engineering Purdue University 465 Northwestern Ave, West Lafayette, Indiana 47907, USA Tel: +1-765-494-3470 Fax: +1-765-494-3358 Email: raghunathan@purdue.edu http://www.ece.purdue.edu/~araghu Areas of interest: Low power and energy-efficient design, System-on-chip design, RTL and behavioral synthesis, design for security, on-chip communication architecture, Algorithm-specific and domain-specific processing architectures.

Energy Efficient Design Methodologies and Green Computing

	Farzan Fallah
			Fujitsu Laboratories of America, Inc. 1240 E Arques Ave. MS 345, Sunnyvale, CA 94085, USA Tel: +1 (408) 530-4544 Fax: +1 (408) 530-4515 Email: farzan@fla.fujitsu.com http://www.flacp.fujitsulabs.com/~ffallah/ Areas of interest: Low power and energy-efficient circuits and systems: analysis, optimization and design, power-aware CAD tools and flows

	Shih-Chieh Chang
			Department of Computer Science National Tsing Hua University 101, Section 2, Kuang-Fu Road, Hsinchu, Taiwan 30013, R.O.C. Tel: 886-3-5742964 Fax: 886-3-5723694 Email: scchang@cs.nthu.edu.tw http://www.cs.nthu.edu.tw/~scchang/ Areas of interest: Logic synthesis, Power and Noise analysis, Low Power analysis and optimization.

	Partha Ranganathan
			Hewlett Packard Labs 1501 Page Mill Road, MS 1177, Palo Alto, California 94304, USA Tel: +1 (650) 857-2238 Fax: +1 (650) 857-7029 Email: Partha.ranganathan@hp.com http://www.hpl.hp.com/personal/Partha_Ranganathan/ Areas of interest: Energy-efficient systems for future computing environments, and green information technologies, computer systems architecture.

Simulation, Validation, and Formal Verification

	Aarti Gupta
			NEC Labs America 4 Independence Way, Suite 200, Princeton, NJ 08540, USA Tel: +1 (609) 951-2966 Fax: +1 (609) 951-2483 Email: agupta@nec-labs.com http://www.nec-labs.com/~agupta/ Areas of interest: Design Verification -- formal methods, hardware verification, software verification

	Robert B. Jones
			Design Technology & Solutions Intel Corporation 2501 NW 229th Ave, RA2-451, Hillsboro, Oregon 97124, USA Tel: +1-971-214-1770 Fax: +1-971-214-1771 Email: robert.b.jones@intel.com http://verify.stanford.edu/rjones/ Areas of interest: Hardware design and verification, formal verification, hardware design methodology

	Peter Feldmann
			IBM T. J. Watson Research Center 1101 Kitchawan Rd, Yorktown Heights, NY 10598, USA. Tel: +1 (914) 945-2512 Email: feldmann@us.ibm.com Areas of interest: Circuit Simulation, Timing Analysis, Power, Clock, Model Order Reduction.

Logic, RTL and Behavioral Synthesis

	Shinji Kimura
			Graduate School of IPS Waseda University 2-7 Hibikino, Wakamatsu, Kitakyushu, Fukuoka, 808-0135 JAPAN Tel: +81-93-692-5374 Fax: +81-93-692-5374 Email: shinji_kimura@waseda.jp http://www.f.waseda.jp/shinji_kimura/ Areas of interest: Logic, RTL and behavioral synthesis, formal verification.

	Preeti Ranjan Panda
			Dept. of Computer Science and Engineering Indian Institute of Technology, Delhi Hauz Khan, New Delhi 110016, India Tel: +91-11-2659-6030 Fax: +91-11-2658-1060 Email: panda@cse.iitd.ac.in http://www.cse.iitd.ernet.in/~panda/ Areas of interest: System Design, High-Level Synthesis.

Physical Design

	Igor Markov
			Dept. of Electrical Engineering and Computer Science University of Michigan 2260 Hayward Ave -- CSE, Ann Arbor, MI 48109-2121, USA Tel: +1 (734) 936-7829 Fax: +1 (734) 763-4617 Email: imarkov@eecs.umich.edu http://www.eecs.umich.edu/~imarkov/ Areas of interest: Combinatorial optimization, design and verification of integrated circuits and quantum logic circuits.

	Hai Zhou
			Dept. of Electrical Engineering and Computer Science Northwestern University 2145 Sheridan Rd. L359, Evanston, IL 60208, USA Tel: +1 (847)491-4155 Fax: +1 (847)467-4144 Email: haizhou@northwestern.edu http://www.ece.northwestern.edu/~haizhou/ Areas of interest: Logic Synthesis, Physical Layout, Design Verification

Testing and Design for Testability

	Kwang-Ting (Tim) Cheng
			Department of Electrical and Computer Engineering University of California, Santa Barbara Room 4109, Engineering I, Santa Barbara, CA 93106-9560, USA Tel: +1-(805) 893-7294 Fax: +1-(805) 893-3262 Email: timcheng@ece.ucsb.edu http://www.ece.ucsb.edu/Faculty/Cheng Areas of interest: System Testing, Design Synthesis, Design Verification

	Sandeep Gupta
			Department of Electrical Engineering University of Southern California 3740 McClintock Ave, Room 336, Los Angeles CA 90089-2562 , USA Tel: +1 213 740-2251 Fax: +1 213 740-9803 Email: skgupta@usc.edu http://poisson.usc.edu/sandeep/ Areas of interest: System Testing

	Sreejit Chakravarty
			LSI Logic M/S: AE192, 1501 McCarthy Blvd Milpitas, CA 95035, USA Tel: +1 408 433 4378 Email: sreejit.chakravarty@lsi.com Areas of interest: System Testing

Design Technologies for Mixed-Signal Circuits and Systems

	Sheldon Tan
			Department of Electrical Engineering University of California, Riverside Eng-II, RM 424, Riverside, California 92521, USA Tel: +1 (951)-827-5143 Fax: +1 (951)-827-2425 Email: stan@ee.ucr.edu http://www.ee.ucr.edu/~stan/ Areas of interest: Simulation and validation, electrical and thermal modeling, compact modeling and reduction.

Digital Design and CAD for Reconfigurable Systems

	Ali Afzali-Kusha
			Dept. of Electrical and Computer Engineering University of Tehran North Kargar Ave, Tehran, Iran Tel: +98 21 8208-4920 Fax: +98 21 8877-8690 Email: afzali5@gmail.com http://nanolab.ut.ac.ir/cm/afzalikusha.htm Areas of interest: Networks on Chip, VLSI Design, Low-Power Digital Design and Memory, SoC Design.

TODAES Information Director

	Prabhat Mishra
			Dept. of Computer and Information Science and Engineering University of Florida P.O. Box 116120, Gainesville, FL 32611-6120, USA Tel: +1 (352) 392-2680 Fax: +1 (352) 392-1220 Email: prabhat@cise.ufl.edu http://www.cise.ufl.edu/~prabhat

TODAES Editorial Assistant