| Authors |
Article |
Citations (Scholar) |
Citations (Portal) |
Vol (Issue), Year |
| Massoud Pedram |
Power minimization in IC design: principles and applications |
515 |
103 |
1(1), January 1996 |
| Luca Benini and Giovanni de Micheli |
System-level power optimization: techniques and tools |
491 |
108 |
5(2), April 2000 |
| P. Panda, F. Catthor, N. Dutt, K. Danckaert, E. Brockmeyer, C. Kulkarni, A. Vandercappelle and P. Kjeldsberg |
Data and memory optimization techniques for embedded systems |
377 |
105 |
6(2), April 2001 |
| Jason Cong and Yuzheng Ding |
Combinational logic synthesis for LUT based field programmable gate arrays |
223 |
46 |
1(2), April 1996 |
| R. Kastner, A. Kaplan, S. Ogrenci Memik and E. Bozorgzadeh |
Instruction generation for hybrid reconfigurable systems |
210 |
73 |
7(4), October 2002 |
| Preeti Ranjan Panda, Nikil Dutt and Alexandru Nicolau |
On-chip vs. off-chip memory: the data partitioning problem in embedded processor-based systems |
175 |
53 |
5(3), July 2000 |
| Yao-Wen Chang, D. F. Wong and C. K. Wong |
Universal switch modules for FPGA design |
152 |
45 |
1(1), January 1996 |
| Kwang-Ting Cheng and A. S. Krishnakumar |
Automatic generation of functional vectors using the extended finite state machine model |
148 |
42 |
1(1), January 1996 |
| Michael Gasteier and Manfred Glesner |
Bus-based communication synthesis on system level |
101 |
40 |
4(1), January 1999 |
| Jason Cong, Andrew B. Kahng, Cheng-Kok Koh, and C.-W. Albert Tsao |
Bounded-skew clock and Steiner routing |
95 |
39 |
3(3), July 1998 |