| Authors |
Article |
Downloads |
Volume (Issue), Year |
| P. Panda, F. Catthor, N. Dutt, K. Danckaert, E. Brockmeyer, C. Kulkarni, A. Vandercappelle and P. Kjeldsberg |
Data and memory optimization techniques for embedded systems |
46 |
6(2), April 2001 |
| Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys |
System-Level Synthesis for Wireless Sensor Node Controllers: A Complete Design Flow |
41 |
17(1), January 2012 |
| Freek Verbeek, Julien Schmaltz |
Easy Formal Specification and Validation of Unbounded Networks-on-Chips Architectures |
34 |
17(1), January 2012 |
| Fang Gong, Xuexin Liu, Hao Yu, Sheldon X. D. Tan, Junyan Ren, Lei He |
A Fast Non-Monte-Carlo Yield Analysis and Optimization by Stochastic Orthogonal Polynomials |
33 |
17(1), January 2012 |
| Massoud Pedram |
Power minimization in IC design: principles and applications |
31 |
1(1), January 1996 |
| Luca Benini and Giovanni de Micheli |
System-level power optimization: techniques and tools |
31 |
5(2), April 2000 |
| Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunheung Paek |
Memory access optimization in compilation for coarse-grained reconfigurable architectures |
25 |
16(4), October 2011 |
| Levent Aksoy, Eduardo Costa, Paulo Flores, Jose Monteiro |
Optimization Algorithms for the Multiplierless Realization of Linear Transforms |
25 |
17(1), January 2012 |
| Jason Cong, Wei Jiang, Bin Liu, Yi Zou |
Automatic memory partitioning and scheduling for throughput and power optimization |
25 |
16(2), March 2011 |
| Andreas Hansson, Kees Goossens, Marco Bekooij, Jos Huisken |
CoMPSoC: A template for composable and predictable multi-processor system on chips |
24 |
14(1), January 2009 |
| Authors |
Article |
Downloads |
Volume (Issue), Year |
| Gaurav Dhiman, Giacomo Marchetti, and Tajana Rosing |
vGreen: A System for Energy-Efficient Management of Virtual Machines |
268 |
16(1), November 2010 |
| Youngsoo Shin, Jun Seomun, Kyu-Myung Choi, and Takayasu Sakurai |
Power gating: Circuits, design methodologies, and best practice for standard-cell VLSI designs |
253 |
15(4), September 2010 |
| Yi Wang, Hui Liu, Duo Liu, Zhiwei Qin, Zili Shao, Edwin H.-M. Sha |
Overhead-aware energy optimization for real-time streaming applications on multiprocessor System-on-Chip |
192 |
16(2), March 2011 |
| Mingxuan Yuan, Zonghua Gu, Xiuqiang He, Xue Liu, and Lei Jiang |
Hardware/software partitioning and pipelined scheduling on runtime reconfigurable FPGAs |
189 |
15(2), February 2010 |
| Gunar Schirner, Andreas Gerstlauer, and Rainer Dömer |
Fast and accurate processor models for efficient MPSoC design |
186 |
15(2), February 2010 |
| Yiding Han, Koushik Chakraborty, Sanghamitra Roy, Vilasita Kuntamukkala |
Design and Implementation of a Throughput-Optimized GPU Floorplanning Algorithm |
154 |
16(3), June 2011 |
| Andrea Calimera, Enrico Macii, and Massimo Poncino |
NBTI-Aware Clustered Power Gating |
137 |
15(4), September 2010 |
| R. K. Raval, C. H. Fernandez, and C. J. Bleakley |
Low-power TinyOS tuned processor platform for wireless sensor network motes |
136 |
15(3), May 2010 |
| David Bol, Denis Flandre, and Jean-Didier Legat |
Nanometer MOSFET Effects on the Minimum-Energy Point of Sub-45nm Subthreshold Logic-Mitigation at Technology and Circuit Levels |
134 |
15(4), September 2010 |
| Alper Sen |
Concurrency-oriented verification and coverage of system-level designs |
121 |
16(4), October 2011 |
| Authors |
Article |
Download Statistics |
Volume (Issue), Year |
|
|
Average/Month |
Last 6 weeks |
Last 12 months |
|
| Alper Sen |
Concurrency-oriented verification and coverage of system-level designs |
26.9 |
24 |
121 |
16(4), October 2011 |
| Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunheung Paek |
Memory access optimization in compilation for coarse-grained reconfigurable architectures |
24.4 |
25 |
110 |
16(4), October 2011 |
| Tak-Yung Kim, Taewhan Kim |
Clock Tree synthesis for TSV-based 3D IC designs |
21.1 |
19 |
95 |
16(4), October 2011 |
| Kartikey Mittal, Arpit Joshi, Madhu Mutyam |
Timing variation-aware scheduling and resource binding in high-level synthesis |
20.9 |
14 |
94 |
16(4), October 2011 |
| Wei-Tsun Sun, Zoran Salcic |
GALS-Designer: A design framework for GALS software systems |
18.2 |
15 |
82 |
16(4), October 2011 |
| Yiding Han, Koushik Chakraborty, Sanghamitra Roy, Vilasita Kuntamukkala |
Design and Implementation of a Throughput-Optimized GPU Floorplanning Algorithm |
18.1 |
9 |
154 |
16(3), June 2011 |
| Xiaofang Wang, Pallav Gupta |
Resource-constrained multiprocessor synthesis for floating-point applications on FPGAs |
18.0 |
14 |
81 |
16(4), October 2011 |
| Filipa Duarte, Jos Hulzink, Jun Zhou, Jan Stuijt, Jos Huisken, Harmke De Groot |
A 36uW heartbeat-detection processor for a wireless sensor node |
17.8 |
13 |
80 |
16(4), October 2011 |
| Yi Wang, Hui Liu, Duo Liu, Zhiwei Qin, Zili Shao, Edwin H.-M. Sha |
Overhead-aware energy optimization for real-time streaming applications on multiprocessor System-on-Chip |
16.7 |
17 |
192 |
16(2), March 2011 |
| Shaoxi Wang, Xinzhang Jia, Arthur B. Yeh, Lihong Zhang |
Analog layout retargeting using geometric programming |
16.2 |
16 |
73 |
16(4), October 2011 |