Design Automation of Electronic Systems (TODAES)


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ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 1 Issue 3, July 1996

Object-oriented cosynthesis of distributed embedded systems
Wayne Wolf
Pages: 301-314
DOI: 10.1145/234860.234861
This article describes a new hardware-software cosynthesis algorithm that takes advantage of the structure inherent in an object-oriented specification. The algorithm creates a distributed system implementation with arbitrary topology, using the...

Low power realization of finite state machines—a decomposition approach
Sue-Hong Chow, Yi-Cheng Ho, TingTing Hwang, C. L. Liu
Pages: 315-340
DOI: 10.1145/234860.234862
We present in this article a new approach to the synthesis problem for finite state machines with the reduction of power dissipation as a design objective. A finite state machine is decomposed into a number of coupled...

A fast algorithm for minimizing FPGA combinational and sequential modules
Dimitrios Kagaris, Spyros Tragoudas
Pages: 341-351
DOI: 10.1145/234860.234863
We present a quadratic-time algorithm for minimizing the number of modules in an FPGA with combinational and sequential modules (like the C-modules and S-modules of the ACT2 and ACT3 architectures). The constraint is that a combinational module...

An optimal clock period selection method based on slack minimization criteria
En-Shou Chang, Daniel D. Gajski, Sanjiv Narayan
Pages: 352-370
DOI: 10.1145/234860.234864
An important decision in synthesizing a hardware implementation from a behavioral description is selecting the clock period to schedule the datapath operations into control steps. Prior to scheduling, most existing behavioral synthesis systems...

Efficient decomposition of polygons into L-shapes with application to VLSI layouts
Mario A. Lopez, Dinesh P. Mehta
Pages: 371-395
DOI: 10.1145/234860.234865
We present two practical algorithms for partitioning circuit components represented by rectilinear polygons so that they can be stored using the L-shaped corner stitching data structure; that is, our algorithms decompose a simple polygon into a...

Register estimation in unscheduled dataflow graphs
R. Moreno, R. Hermida, M. Fernández
Pages: 396-403
DOI: 10.1145/234860.234866
A method for register number estimation in unscheduled or partially scheduled dataflow graphs is presented. The strategy consists of studying the probability that an edge between two nodes crosses the boundary between two control steps, and its...