Design Automation of Electronic Systems (TODAES)


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ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 4 Issue 4, Oct. 1999

Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers
L. Benini, G. De Micheli, E. Macii, M. Poncino, R. Scarsi
Pages: 351-375
DOI: 10.1145/323480.323482
Recent results have shown that dynamic power management is effective in reducing the total power consumption of sequential circuits. In this paper, we propose a bottom-up approach for the automatic extraction and synthesis of dynamic power...

A flexible datapath allocation method for architectural synthesis
Kyumyung Choi, Steven P. Levitan
Pages: 376-404
DOI: 10.1145/323480.323486
We present a robust datapath allocation method that is flexible enough to handle constraints imposed by a variety of target architectures. Key features of this method are its ability to handle accurate modeling of datapath units and the...

Power optimization using divide-and-conquer techniques for minimization of the number of operations
Inki Hong, Miodrag Potkonjak, Ramesh Karri
Pages: 405-429
DOI: 10.1145/323480.323489
We introduce an approach for power optimization using a set of compilation and architectural techniques. The key technical innovation is a novel divide-and-conquer compilation technique to minimize the number of operations for general...

A methodology and algorithms for the design of hard real-time multitasking ASICs
Miodrag Potkonjak, Wayne Wolf
Pages: 430-459
DOI: 10.1145/323480.323491
Traditional high-level synthesis concentrates on the implementation of a single task (e.g. filter, linear controller, A/D converter). However, many applications—multifunctional embedded controllers intelligent wireless end-points, and DSP...