Design Automation of Electronic Systems (TODAES)


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ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 6 Issue 1, Jan. 2001

Performance-constrained hierarchical pipelining for behaviors, loops, and operations
Smita Bakshi, Daniel D. Gajski
Pages: 1-25
DOI: 10.1145/371254.371256
Behavioral specifications of DSP systems generally contain a number of nested loops. In order to obtain high date rates for such systems, it is necessary to pipeline the system within the behavior, within the loop bodies, and also within the...

Optimal test access architectures for system-on-a-chip
Krishnendu Chakrabarty
Pages: 26-49
DOI: 10.1145/371254.371258
Test access is a major problem for core-based system-on-a-chip (SOC) designs. Since embedded cores in an SOC are not directly accessible via chip inputs and outputs, special access mechanisms are required to test them at the system level. An...

Architecture-level power estimation and design experiments
Rita Yu Chen, Mary Jane Irwin, Raminder S. Bajwa
Pages: 50-66
DOI: 10.1145/371254.371262
Architecture-level power estimation has received more attention recently because of its efficiency. This article presents a technique used to do power analysis of processors at the architecture level. It provides cycle-by-cycle power consumption...

POSE: a parallel object-oriented synthesis environment
Pao-Ann Hsiung
Pages: 67-92
DOI: 10.1145/371254.371263
Design automation tools and methodologies always encounter a problem of how systems may be designed efficiently, including issues such as static modeling and dynamic manipulation of system parts. With the rapid progress of design technology, the...

Co-synthesis of pipelined structures and instruction reordering constraints for instruction set processors
Ing-Jer Huang
Pages: 93-121
DOI: 10.1145/371254.371268
This paper presents a hardware/software co-synthesis approach to pipelined ISP (instruction set processor) design. The approach synthesizes the pipeline structure from a given instruction set architecture (behavioral) specification. In addition,...

A mapping algorithm for computer-assisted exploration in the design of embedded systems
E. P. Mariatos, A. N. Birbas, M. K. Birbas
Pages: 122-147
DOI: 10.1145/371254.371273
We present a technique for automatic exploration of architectural alternatives in the design of complex electronic embedded systems and systems-on-a-chip. The technique transforms the problem into a set of simple model-to-model operations and a...