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Security Analysis of Arbiter PUF and Its Lightweight Compositions Under Predictability Test

Unpredictability is an important security property of Physically Unclonable Function (PUF) in the context of statistical attacks, where the... (more)

CALM

With the emergence of many-core multiprocessor system-on-chips (MPSoCs), on-chip networks are facing serious challenges in providing fast communication among various tasks and cores. One promising on-chip network design approach shown in recent studies is to add express channels to traditional mesh network as shortcuts to bypass intermediate... (more)

Scalable SMT-Based Equivalence Checking of Nested Loop Pipelining in Behavioral Synthesis

In this article, we present a novel methodology based on SMT-solvers to verify equality of a high-level described specification and a pipelined RTL... (more)

Optimized Implementation of Multirate Mixed-Criticality Synchronous Reactive Models

Model-based design using Synchronous Reactive (SR) models enables early design and verification of application functionality in a platform-independent... (more)

Reducing the Complexity of Dataflow Graphs Using Slack-Based Merging

There exist many dataflow applications with timing constraints that require real-time guarantees on safe execution without violating their deadlines.... (more)

Security in Automotive Networks

With the increasing amount of interconnections between vehicles, the attack surface of internal vehicle networks is rising steeply. Although these networks are shielded against external attacks, they often do not have any internal security to protect against malicious components or adversaries who... (more)

On the Restore Time Variations of Future DRAM Memory

As the de facto main memory standard, DRAM (Dynamic Random Access Memory) has achieved dramatic density improvement in the past four decades, along... (more)

A Hybrid DRAM/PCM Buffer Cache Architecture for Smartphones with QoS Consideration

Flash memory is widely used in mobile phones to store contact information, application files, and other types of data. In an operating system, the... (more)

An Elastic Mixed-Criticality Task Model and Early-Release EDF Scheduling Algorithms

Many algorithms have recently been studied for scheduling mixed-criticality (MC) tasks. However, most existing MC scheduling algorithms guarantee the... (more)

Computation of Seeds for LFSR-Based n-Detection Test Generation

This article describes a new procedure that generates seeds for LFSR-based test generation when the goal is to produce an n-detection test set. The... (more)

Scale & Cap

As the number of cores per server node increases, designing multi-threaded applications has become essential to efficiently utilize the available hardware parallelism. Many application domains have started to adopt multi-threaded programming; thus, efficient management of multi-threaded applications has become a significant research problem.... (more)

Secure and Flexible Trace-Based Debugging of Systems-on-Chip

This work tackles the conflict between enforcing security of a system-on-chip (SoC) and providing observability during trace-based debugging. On one... (more)

NEWS

ACM TODAES Special Section Call for Papers - Internet of Things System Performance, Reliability, and Security
- Editors: Rasit O. Topaloglu (IBM) and Farinaz Koushanfar (University of California San Diego) 
Call_for_Papers.pdf

ACM TODAES new page limit policy: Manuscripts must be formatted in the ACM Transactions format; a 25-page limit applies to the final paper. Rare exceptions are possible if recommended by the reviewers and approved by the Editorial Board.

ORCID is a community-based effort to create a global registry of unique researcher identifiers for the purpose of ensuring proper attribution of works to their creators. When you submit a manuscript for review, you will be presented with the opportunity to register for your ORCID.

Forthcoming Articles
Approximate Energy-Efficient Encoding for Serial Interfaces

Serial buses are ubiquitous interconnections in embedded computing systems that are used to interface processing elements with peripherals, such as sensors, actuators and I/O controllers. In spite of their limited wiring, as off-chip connections they can account for a significant amount of the total power consumption of a system-on-chip device. Encoding the information sent on these buses is the most intuitive and affordable way to reduce their power contribution; moreover, the encoding can me made even more effective by exploiting the fact that many embedded applications can tolerate intermediate approximations without a significant impact on the final quality of results, thus trading off accuracy for power consumption. We propose a simple yet very effective approximate encoding for reducing dynamic energy in serial buses. Our approach uses differential encoding as a baseline scheme, and extends it with bounded approximations to overcome the intrinsic limitations of differential encoding for data with low temporal correlation. We show that the proposed scheme, besides yielding extremely compact codecs, is superior to all state-of-the-art approximate serial encodings over a wide set of traces representing data received or sent from/to sensor or actuators.

SSAGA: SMs Synthesized for Asymmetric GPGPU Applications

Emergence of GPGPU applications, bolstered by flexible GPU programming platforms, has created a tremendous challenge in maintaining a high energy efficiency in modern GPUs. In this paper, we demonstrate that, customizing a Streaming Multiprocessor (SM) of a GPU, at a lower frequency, is significantly more energy efficient, compared to employing DVFS on an SM, designed for a high frequency operation. Using a system level CAD technique, we propose SSAGAStreaming Multiprocessors Sculpted for Asymmetric GPGPU Applications, an energy efficient GPU design paradigm. SSAGA creates architecturally identical SM cores, customized for different voltage-frequency domains. Our rigorous cross-layer methodology demonstrates an average of 20% improvement in energy efficiency, over a spatially multitasking GPU, across a range of GPGPU applications.

Generation of Transparent-Scan Sequences for Diagnosis of Scan Chain Faults

Diagnosis of scan chain faults is important for yield learning and improvement. Procedures that generate tests for diagnosis of scan chain faults produce scan-based tests with one or more functional capture cycles between a scan-in and a scan-out operation. The approach to test generation referred to as transparent-scan has several advantages in this context. (1) It allows functional capture cycles and scan shift cycles to be interleaved arbitrarily. This increases the flexibility to assign to the scan cells values that are needed for diagnosis. (2) Test generation under transparent-scan considers a circuit model where the scan logic is included explicitly. Consequently, the test generation procedure takes into consideration the full effect of a scan chain fault. It thus produces accurate tests. (3) For the same reason it can also target faults inside the scan logic. (4) Transparent-scan results in compact test sequences. Compaction is important because of the large volumes of fail data that scan chain faults create. The cost of transparent-scan is that it requires simulation procedures for sequential circuits, and that arbitrary sequences would be applicable to the scan select input. Motivated by the advantages of transparent-scan, and the importance of diagnosing scan chain faults, this paper describes a procedure for generating transparent-scan sequences for diagnosis of scan chain faults. The procedure is also applied to produce transparent-scan sequences for diagnosis of faults inside the scan logic.

Test Modification for Reduced Volumes of Fail Data

As part of a yield improvement process, fail data is collected from faulty units. Several approaches exist for reducing the tester time and the volume of fail data that needs to be collected based on the observation that a subset of the fail data is sufficient for accurate defect diagnosis. This paper addresses the volume of fail data by considering the test set that is used for collecting fail data. The paper observes that certain faults from a set of target faults produce significantly larger numbers of faulty output values (and therefore, significantly larger volumes of fail data) than other faults under a given test set. Based on this observation the paper describes a procedure for modifying the test set so as to reduce the maximum number of faulty output values that a target fault produces. When defects are considered in a simulation experiment, and a defect diagnosis procedure is applied to the fail data they produce, two effects are observed. (1) The maximum and average numbers of faulty output values per defect are reduced significantly with the modified test set. (2) The quality of diagnosis is similar or even improved with the modified test set.

Multi-Harmonic Small-Signal Modeling of Low Power PWM DC-DC Converters

Small-signal models of pulse-width modulation (PWM) converters are widely used for analyzing stability and play an important role in converter design and control. However, existing small-signal models are either based on averaged DC behaviors, hence are unable to capture frequency responses that are faster than the switching frequency, or greatly approximate these high-frequency responses. We address the severe limitations of the existing models by proposing a multi-harmonic model that provides a complete small-signal characterization of both DC averages and high-order harmonic responses. The proposed model captures important high-frequency overshoots and undershoots of the converter response, which are otherwise unaccounted for by the existing techniques. In two converter examples, the proposed model corrects the misleading results of the existing models by providing truthful characterization of the overall converter AC response, and offers important guidance for converter design and closed-loop control.

Time-triggered Scheduling of Mixed-criticality Systems

Real-time and embedded systems are moving from the traditional design paradigm to integration of multiple functionalities onto a single computing platform. Some of the functionalities are safety-critical and subject to certification. The rest of the functionalities are non-safety critical and dont need to be certified. Designing efficient scheduling algorithms which can be used to meet the certification requirement is challenging. Our research considers the time-triggered approach to scheduling of dual-criticality mixed-criticality jobs. The first proposed algorithm for the time-triggered approach is based on the OCBP scheduling algorithm which finds a fixed-priority order of jobs. Based on this priority order, the existing algorithm constructs two scheduling tables S^{oc}_{LO} and S^{oc}_{HI}. The scheduler uses these tables to find a scheduling strategy. Another time-triggered algorithm called MCEDF was proposed as an improvement over the OCBP-based algorithm. Here we propose an algorithm which directly construct two scheduling tables without having a priority order. Furthermore, we show that our algorithm schedules a strict superset of instances which can be scheduled by the OCBP-based algorithm as well as MCEDF. We show that our algorithm outperforms both the OCBPbased algorithm and MCEDF in terms of the number of instances scheduled in a randomly generated set of instances. We generalize our algorithm for jobs with m-criticality levels. Subsequently, we extend our algorithm to find scheduling tables for periodic and dependent jobs. Finally, we show that our algorithm is also applicable to the synchronous programs upon uniprocessor platforms and schedules a bigger set of instances than the existing algorithm.

Generating Current Constraints to Guarantee RLC Power Grid Safety

A critical task during early chip design is the efficient verification of the chip power distribution network. Vectorless verification, developed over the last decade as an alternative to traditional simulation-based methods, requires the user to specify current constraints (budgets) for the underlying circuitry and checks if the corresponding voltage variations on all grid nodes are within a user-specified margin. This framework is extremely powerful as it allows for efficient and early verification, but specifying/obtaining current constraints remains a burdensome task for users and a hurdle to adoption of this framework by the industry. Recently, the inverse problem has been introduced: generate circuit current constraints that, if satisfied by the underlying logic circuitry, would guarantee grid safety from excessive voltage variations. This approach has many potential applications, including various grid quality metrics, as well as voltage drop aware placement and floorplanning. So far, this framework has been developed assuming an RC model of the power grid. Inductive effects are becoming a significant component of the power supply noise and can no longer be ignored. In this paper, we extend the constraints generation approach to allow for inductance. We give a rigorous problem definition and develop some key theoretical results related to maximality of the current space defined by the constraints. Based on this, we then develop three constraints generation algorithms that target the peak total chip power that is allowed by the grid, the uniformity of current distribution across the die area, and a combination of both metrics.

A Single-Tier Virtual Queuing Memory Controller Architecture for Heterogeneous MPSoCs

Heterogeneous MPSoCs typically integrate diverse cores, including application CPUs, GPUs, and HD coders. These cores commonly share an off-chip memory to save cost and energy, but their memory accesses often interfere with each other, leading to undesirable consequences like a slowdown of application performance or a failure to sustain real-time performance. The memory controller plays a central role in meeting the QoS needs of real-time cores while maximizing the CPU performance. Previous QoS-aware memory controllers are based on a classic two-tier queuing architecture that buffers memory transactions at the first tier, followed by a second tier that buffers translated DRAM commands. In these designs, QoS-aware policies are used to schedule competing transactions at the first stage, but the translated DRAM commands are serviced in FIFO order at the second stage. Unfortunately, once the scheduled transactions have been forwarded to the command stage, newly arriving transactions that may be more critical cannot be serviced ahead of those translated commands that are already queued at the second stage. To address this, we propose a scalable memory controller architecture based on Single-Tier Virtual Queuing (STVQ) that maintains a single-tier of request queues and employs an efficacious scheduler that considers both QoS requirements and DRAM bank states. In comparison with previous QoS-aware memory controllers, the proposed STVQ memory controller reduces CPU slowdown by up to 13.9% while satisfying all frame rate requirements. We propose further optimizations that can significantly increase row-buffer hits by up to 66.2% and reduce memory latency by up to 19.8%.

Proof-Carrying Hardware via IC3

Proof-carrying hardware is a principle for achieving safety for dynamically reconfigurable hardware systems. The producer of a hardware module spends the huge effort for creating a proof for a safety policy. The proof is then transferred as a certificate together with the configuration bitstream to the consumer of the hardware module, who can quickly verify the given proof. Previous work utilized SAT solvers and resolution traces to set up a proof-carrying hardware technology and corresponding tool flows. In this paper, we present a novel technology for proof-carrying hardware based on inductive invariants. For sequential circuits, our approach is fundamentally stronger than the previous SAT-based one since we avoid the limitations of bounded unrolling. We contrast our technology with existing ones and show that it fits into previously proposed tool flows. We conduct experiments with three categories of benchmark circuits and report consumer and producer runtime and peak memory consumption, as well as the size of the certificates and the distribution of the workload between producer and consumer. Experiments clearly show that our new induction-based technology is superior for sequential circuits, while the previous SAT-based technology is the better choice for combinational circuits.

Low-Power Clock Tree Synthesis for 3D-ICs

We propose efficient algorithms to construct low-power clock tree for through-silicon-via (TSV) based 3D-ICs. We use shutdown gates to save clock tree's dynamic power, which selectively turn off certain clock tree branches to avoid unnecessary clock activities when the modules in these tree branches are inactive. While this clock gating technique has been extensively studied in 2D circuits, its application in 3D-ICs is unclear. In 3D-ICs, a shutdown gate is connected to control signal unit through control TSVs, which may cause placement conflicts with existing clock TSVs in the layout due to TSV's large physical dimension. We develop a two-phase clock tree synthesis design flow for 3D-ICs: (1) 3D abstract clock tree generation based on K-means clustering. (2) Clock tree embedding with simultaneous shutdown gates insertion based on simulated annealing (SA) and a force-directed TSV placer. Experimental results indicate that: (1) The K-means clustering heuristic significantly reduces the clock power by clustering modules with similar switching behavior and close proximity. (2) The SA algorithm effectively inserts the shutdown gates to a 3D clock tree, while considering control TSV's placement. Compared with previous 3D clock tree synthesis technique, our K-means clustering based approach achieves larger reduction in clock tree power consumption while ensuring zero clock skew.

Scalable Bandwidth Shaping Scheme via Adaptively Managed Parallel Heaps in Many-core Based Network Processors

Scalability of network processor based routers heavily depends on limitations imposed by memory accesses and associated power consumption. Bandwidth shaping of a flow is a key function which requires a token bucket per output queue and abuses memory bandwidth. As the number of output queues increases, man- aging token buckets becomes prohibitively expensive and limits the scalability. In this work, we propose a scalable software-based token bucket management scheme that can reduce the memory accesses and power consumption significantly. To satisfy real-time and low-cost constraints, we propose novel parallel heap data structures running on a many-core based network processor. By using cache locking, the performance of heap processing is enhanced significantly and more predictable. In addition, we quantitatively analyze the performance and memory footprint of the proposed software scheme using stochastic modeling and Lyapunov central limit theorem. Finally, the proposed scheme provides an adaptive method to limit the size of heaps in case of oversubscribed queues, which can successfully isolate the queues showing unideal behavor. The proposed scheme reduces the memory accesses by up to three orders of magnitude for one million queues sharing a 100 Gbps interface of the router while maintaining stability under stressful scenarios.

Application-Specific Residential Microgrid Design Methodology

In power system industry, the traditional, non-interactive, and manually-controlled power grid has been transformed to cyber-dominated smart grid. This cyber-physical integration has provided the smart grid with communication, monitoring, computation, and controlling capabilities to improve its reliability, energy efficiency, and flexibility. A microgrid as a localized and semi-autonomous group of smart energy systems, utilizes the above-mentioned capabilities to drive modern technologies such as electric vehicle charging, home energy management, smart appliances, etc. Designing, upgrading, testing, and verifying these microgrids can get too complicated to handle manually. The complexity is due to the wide range of solutions and components that are intended to address the microgrid problems. This paper presents a novel Model-Based Design (MBD) methodology to model, co-simulate, design, and optimize microgrid and its multi-level controllers. It helps us to design, optimize, and validate a microgrid for a specific application. The application rules, requirements, and design-time constraints are met in the designed/optimized microgrid while the implementation cost is minimized. Based on our novel methodology, a design automation, co-simulation, and analysis tool, called GridMAT, is implemented. Our experiments have illustrated that implementing a hierarchical controller reduces the average power consumption by 8% and shifts the peak load for cost saving. Moreover, using our MBD methodology with smart controllers, the total implementation cost decreases by 14%, when upgrading a microgrid, compared to the conventional methodology and 5%, compared to the case where smart controllers are not considered.

Using CoreSight PTM to integrate CRA monitoring IPs in an ARM-based SoC

ARM CoreSight PTM has been widely deployed in recent ARM processors for real-time debugging and tracing of software. Using PTM, the external debugger can extract execution behaviors of applications running on an ARM processor. Recently, some researchers begin to use this feature for other purposes such as fault tolerant computation and security monitoring. This motivated us to develop an external security monitor that can detect control hijacking attacks, of which goal is to maliciously manipulate the control flow of victim applications at attackers disposal. Especially, this paper focuses on detecting a special type of attacks, called code reuse attacks (CRA), which uses a recently-introduced technique that allows attackers to perform arbitrary computation without injecting their code by reusing only the existing code fragments. Our external monitor is attached to the outside of the host system via the system bus and ARM CorSight PTM, and fed with execution traces of a victim application running on the host. As a majority of CRAs violates the normal execution behaviors of a program, our monitor constantly watches and analyzes the execution traces of the victim application and detect a symptom of attacks when the execution behaviors violate certain rules that normal applications are known to adhere. We present two different implementations for this purpose; a hardware-based solution in which all the CRA detection components are implemented in hardware, and a hardware/software mixed solution that can be employed in more resource constrained environment where the deployment of the full hardware level CRA detection is burdensome.

Content-Aware Bit Shuffling for Maximizing PCM Endurance

Recently, phase change memory (PCM) is emerging as a strong replacement for DRAM owing to its many advantages such as non-volatility, high scalability, and so on. However, PCM is still restricted for use as main memory because of its limited write endurance. There have been many methods introduced to resolve the problem by reducing bit flips. Although they have significantly contributed to bit flip reduction, they still have the drawback that the lower bits are flipped more often than the higher bits. The reason is that these methods do not consider the fact that, in general, the lower bits are updated much more frequently than the higher bits. In this paper, we propose a noble content-aware bit shuffling (CABS) technique that minimizes bit flips and evenly distributes them to maximize the lifetime of PCM at the bit level. We also introduce two additional optimizations, namely, addition of an inversion bit and use of an XOR key, to further reduce bit flips. Moreover, CABS is capable of recovering from stuck-at faults by restricting the change in values of stuck-at cells. Experimental results showed that CABS outperformed the existing state-of-the-art methods in the aspect of PCM lifetime extension with minimal overhead. Specifically, CABS achieved up to 48.5% enhanced lifetime compared to the data comparison write (DCW) method, while consuming a few extra resources for metadata. We have also confirmed that CABS is fully applicable to BCH codes as it was able to reduce the maximum number of bit flips in metadata cells by 32.1%.

CDTA: A Comprehensive Solution for Counterfeit Detection, Traceability and Authentication in IoT Supply Chain

The Internet of Things (IoT) is transforming the way we live and work by increasing the connectedness of people and things on a scale that was once unimaginable. However, the vulnerabilities in IoT supply chain have raised serious concerns about the security and trustworthiness of IoT devices and components on them. Testing for device provenance, detection of counterfeit integrated circuits (ICs) and systems, and traceability of IoT devices are challenging issues to address. In this paper, we develop a novel RFID-based system suitable for Counterfeit Detection, Traceability and Authentication in IoT supply chain called CDTA. CDTA is composed of different types of on-chip sensors and in-system structures that collect necessary information to detect multiple counterfeit IC types (recycled, cloned, etc.), track and trace IoT devices, and verify the overall system authenticity. Central to CDTA is an RFID tag employed as storage and a channel to read the information from different types of chips on the printed circuit board (PCB) in both power-on and power-off scenarios. A novel board ID generator is implemented by combining outputs of physical unclonable functions (PUFs) embedded in RFID tag and different chips on the PCB. A light-weight RFID protocol is proposed to enable mutual authentication between RFID readers and tags. We also implement a secure inter-chip communication on the PCB. Simulations and experimental results using Spartan 3E FPGAs demonstrate the effectiveness of this system. The efficiency of the radio frequency (RF) communication has also been verified via a PCB prototype with a printed slot antenna.

Training Fixed-Point Classifiers for On-Chip Low-Power Implementation

In this paper, we develop several novel algorithms to train on-chip classifiers that can be implemented with low-power fixed-point arithmetic with extremely small word length. These algorithms are based upon linear discriminant analysis (LDA), support vector machine (SVM) and logistic regression (LR), and are referred to as LDA-FP, SVM-FP and LR-FP respectively. They incorporate the non-idealities (i.e., rounding and overflow) associated with fixed-point arithmetic into the training process so that the resulting classifiers are robust to these non-idealities. Mathematically, LDA-FP, SVM-FP and LR-FP are formulated as mixed integer programming problems that can be efficiently solved by the branch-and-bound methods described in this paper. Our numerical experiments demonstrate that LDA-FP, SVM-FP and LR-FP substantially outperform the conventional approaches for the emerging biomedical application of brain decoding.

Temperature Effect Inversion Aware Dynamic Thermal Management for FinFET Circuits

Due to the superb characteristics, FinFETs have emerged as a promising replacement for planar CMOS devices in sub-20nm CMOS technology nodes. However, based on extensive simulations, we have observed that the gate delay vs. temperature characteristics of FinFET circuits may be fundamentally different from that of the conventional bulk CMOS circuits, i.e., the delay of a FinFET circuit decreases with increasing temperature even in the super-threshold supply voltage regime. Fur- thermore, with the optimal buffer insertion, we have observed that interconnect delay of the FinFET circuits may follow the same trend for the temperature change. Unfortunately, the leakage power dissipation of the FinFET-based circuits increases exponentially with the temperature. These two trends give rise to a tradeoff between delay and leakage power as a function of the chip temperature, and hence, lead to the definition of an optimum chip temperature operating point (i.e., one that balances concerns about the circuit speed and power efficiency.) This paper presents the results of our investigations into the aforesaid temperature effect inversion (TEI) and proposes a novel dynamic thermal management (DTM) algorithm, which exploits this phenomenon to minimize the energy consumption of FinFET circuits without any appreciable performance penalty. Experi- mental results demonstrate that significant energy saving (as high as 36%, with no performance penalty) can be achieved by the proposed TEI-aware DTM approach compared to the best-in-class DTMs that are unaware of this phenomenon.

NoC-HMP: A Heterogeneous Multicore Processor for Embedded Systems Designed in SystemJ

Scalability and performance in multicore processors for embedded and real-time systems usually dont go well each with the other. NoCs provide scalable execution platforms suitable for such kind of embedded systems. This paper presents a NoC-based heterogeneous multi-core system, called NoC-HMP, which is a scalable platform for embedded systems developed in the GALS language SystemJ. NoC-HMP uses a time-predictable TDMA-MIN NoC to guarantee latencies and communication time between the two types of time-predictable cores and can be customized for specific performance goal through the execution strategy and scheduling of SystemJ program deployed across multiple cores. Examples of different execution strategies are introduced, explored and analyzed via measurements. The number of used cores can be minimized to achieve the target performance of the application. TDMA-MIN allows easy extensions of NoC-HMP with other cores or IP blocks. Experiments show a significant improvement of performance over a single core solution and demonstrate how the addition of cores affects the performance of the designed system.

Parallel High-Level Synthesis Design Space Exploration for Behavioral IPs of Exact Latencies

This works presents a Design Space Exploration (DSE) method for Behavioral IPs (BIPs) given in ANSI-C or SystemC in order to find the smallest micro-architecture for a specific target latency. Previous work on High-Level Synthesis (HLS) DSE mainly focused on finding a trade-off curve with Pareto-optimal designs. HLS is however a single process (component) synthesis method. Very often, the latency of the components requires a specific fixed latency when inserted within a larger system. This work presents a fast multi-threaded method to find the smallest micro-architecture for a given BIP and target latency, by discriminating between all different exploration knobs and exploring these concurrently. Experimental results shows that our propose method is very effective and comprehensive results compare the quality of results vs. the speedup of your proposed explorer.

Automated Integration of Dual-Edge Clocking for Low-Power Operation in Nanometer Nodes

Clocking power, including both clock distribution and registers, has long been one of the primary factors in the total power consumption of many digital systems. One straightforward approach to reduce this power consumption is to apply dual-edge triggered (DET) clocking, since sequential elements operate at half the clock frequency, while maintaining same throughput as with conventional single-edge triggered (SET) clocking. However, the DET approach is rarely taken in modern integrated circuits, primarily due to the perceived complexity of integrating such a clocking scheme. In this paper, we first identify the most promising conditions for achieving low-power operation with DET clocking, and then introduce a fully automated design flow for applying DET to a conventional SET design. The proposed design flow is demonstrated on three benchmark circuits in a 40 nm CMOS technology, providing as much as a 50% reduction in clock distribution and register power consumption.

Bibliometrics

Publication Years 1996-2017
Publication Count 904
Citation Count 4310
Available for Download 904
Downloads (6 weeks) 2348
Downloads (12 Months) 21938
Downloads (cumulative) 364488
Average downloads per article 403
Average citations per article 5
First Name Last Name Award
Iris Bahar ACM Distinguished Member (2012)
Robert Brayton ACM Paris Kanellakis Theory and Practice Award (2006)
Krishnendu Chakrabarty ACM Distinguished Member (2008)
ACM Senior Member (2006)
Naehyuck Chang ACM Distinguished Member (2012)
ACM Senior Member (2007)
Danny Z Chen ACM Distinguished Member (2014)
ACM Senior Member (2011)
Nikil D. Dutt ACM Distinguished Member (2007)
Suhaib A Fahmy ACM Senior Member (2013)
Franz Franchetti ACM Senior Member (2015)
ACM Gordon Bell Prize (2006)
Soheil Ghiasi ACM Senior Member (2015)
Prosenjit Gupta ACM Senior Member (2008)
Matthew Guthaus ACM Senior Member (2013)
Pao-Ann Hsiung ACM Senior Member (2006)
Mary Jane Irwin ACM Athena Lecturer Award (2010)
ACM Distinguished Service Award (2005)
John Lee ACM Senior Member (2014)
Roman Lysecky ACM Senior Member (2014)
Diana Marculescu ACM Distinguished Member (2011)
ACM Senior Member (2009)
Igor Markov ACM Distinguished Member (2011)
ACM Senior Member (2007)
Sally A McKee ACM Senior Member (2013)
Prabhat Mishra ACM Distinguished Member (2015)
ACM Senior Member (2010)
Saraju P. Mohanty ACM Senior Member (2010)
Trevor Mudge ACM-IEEE CS Eckert-Mauchly Award (2014)
Walid Najjar ACM Distinguished Member (2015)
ACM Senior Member (2014)
Steven M Nowick ACM Senior Member (2009)
Ian Parberry ACM Distinguished Member (2015)
Massoud Pedram ACM Distinguished Member (2008)
Sreeranga P Rajan ACM Distinguished Member (2014)
Bantwal R Rau ACM-IEEE CS Eckert-Mauchly Award (2002)
Sartaj K Sahni ACM Karl V. Karlstrom Outstanding Educator Award (2003)
Robert Schreiber ACM Distinguished Member (2006)
Sandeep K Shukla ACM Distinguished Member (2012)
ACM Senior Member (2007)
Anand Sivasubramaniam ACM Distinguished Member (2010)
ACM Senior Member (2009)
Peter James Stuckey ACM Distinguished Member (2009)
Mateo Valero ACM Distinguished Service Award (2012)
ACM-IEEE CS Eckert-Mauchly Award (2007)
Robert A. Walker Outstanding Contribution to ACM Award (2007)
ACM Distinguished Member (2006)
David Whalley ACM Distinguished Member (2009)
ACM Senior Member (2009)
Steve Wilton ACM Senior Member (2006)
Zeljko Zilic ACM Senior Member (2009)

First Name Last Name Paper Counts
Francky Catthoor 18
Irith Pomeranz 15
Nikil Dutt 15
Krishnendu Chakrabarty 13
Jason Cong 12
Sheldon Tan 10
Partha Chakrabarti 10
TingTing Hwang 9
Sachin Sapatnekar 9
Lei He 8
Yaowen Chang 8
Spyros Tragoudas 7
Yunheung Paek 7
Evangeline Young 7
Frank Vahid 7
Pallab Dasgupta 7
Massoud Pedram 7
Danny Wong 7
Luca Benini 7
Taewhan Kim 6
Martin Wong 6
Alexandru Nicolau 6
John Hayes 6
Bhargab Bhattacharya 6
Ryan Kastner 6
Chengkok Koh 6
Radu Marculescu 6
Sudhakar Reddy 6
Igor Markov 6
Ali Dasdan 5
Sule Ozev 5
Xiaobosharon Hu 5
Sharad Malik 5
David Pan 5
Kiyoung Choi 5
Ramesh Karri 5
Kaushik Roy 5
Mahmut Kandemir 5
Umit Ogras 5
Soonhoi Ha 5
Jenqkuen Lee 5
Preeti Panda 5
Rajeev Kumar 5
Jintai Yan 5
Aviral Shrivastava 5
Giovanni De Micheli 5
Andrew Kahng 5
Tony Givargis 5
Nagarajan Ranganathan 5
Roman Lysecky 5
Chungkuan Cheng 5
Kwangting Cheng 4
Rajesh Gupta 4
Zijiang Yang 4
Sunil Khatri 4
Chialin Yang 4
Jingyang Jou 4
El Aboulhamid 4
Aarti Gupta 4
Pinghung Yuh 4
Shihhsu Huang 4
Twan Basten 4
Peter Petrov 4
Peng Li 4
Iris Jiang 4
Alex Jones 4
Yuanhao Chang 4
Martin Lukasiewycz 4
Hungming Chen 4
Sunyuan Hsieh 4
Hans Wunderlich 4
Chang Liu 4
Sebastian Steinhorst 4
Allen Wu 4
Naehyuck Chang 4
Miodrag Potkonjak 4
Wen Jone 4
Paul Gratz 4
Jongeun Lee 4
Dinesh Mehta 4
Franco Fummi 4
Paulo Flores 4
Hai Zhou 4
Dirk Stroobandt 4
Zonghua Gu 4
Azadeh Davoodi 4
Xianlong Hong 3
Greg Stitt 3
Li Wang 3
Chakkuen Wong 3
Waikei Mak 3
Seda Memik 3
Akash Kumar 3
Yuan Xie 3
Karel Bruneel 3
Henk Corporaal 3
Dimitrios Kagaris 3
Bijan Alizadeh 3
Praveen Raghavan 3
Valeria Bertacco 3
Viktor Prasanna 3
Diana Marculescu 3
Jürgen Teich 3
Ronald Blanton 3
Zili Shao 3
Ozgur Sinanoglu 3
Paolo Prinetto 3
Paoann Hsiung 3
Sreejit Chakravarty 3
Guangming Wu 3
Axel Jantsch 3
Alain Girault 3
Janet Roveda 3
Guy Gogniat 3
Sisira Panda 3
Zoran Salcic 3
Dipankar Das 3
Prabhat Mishra 3
Masanori Kurimoto 3
Yuchin Hsu 3
Xiaoyu Song 3
Yunsi Fei 3
Anna Bernasconi 3
Ozcan Ozturk 3
Samarjit Chakraborty 3
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Ofer Strichman 1
Kartikey Mittal 1
Michael Healy 1
Zhongzhen Wu 1
Chingwei Yeh 1
Keven Dunn 1
Stanley Baumgart 1
Saravanan Padmanaban 1
Stylianos Mamagkakis 1
André Nácul 1
Shaoxi Wang 1
Karthikeyan Lingasubramanian 1
Rajeshkumar Sambandam 1
Sandeep Gupta 1
Tobias Becker 1
Xufa Wang 1
Jun Seomun 1
Takayasu Sakurai 1
Subhashis Majumder 1
Jean Berge 1
Chittaranjan Mandal 1
Mohamed Elwakil 1
Joan Lopez 1
ChungHwang Chen 1
JyhMou Tseng 1
Gerda Janssens 1
Wenrui Gong 1
Brian DeRenzi 1
Michael Boyer 1
Srikanth Venkataraman 1
Horácio Neto 1
Joseph Shinnerl 1
Qingan Li 1
Esteban Tlelo-Cuautle 1
Klaus Eckl 1
Kuenjong Lee 1
Tsungchu Huang 1
Andrew Wolfe 1
Yau Li 1
Huankai Peng 1
HsuanMing Huang 1
Paolo Camurati 1
K Tsai 1
Wanting Lo 1
Chiehjui Lee 1
Chandu Visweswariah 1
Yubin Zhang 1
Daujieu Yang 1
Huihsin Hsu 1
Jenhao Chen 1
Douglas Keller 1
Adam Hartman 1
Jongkyung Paek 1
Enshou Chang 1
Chi Zhang 1
Xu He 1
Yao Wang 1
Swarup Bhunia 1
Megha Gandhi 1
Arnab Sarkar 1
Ibrahim Hajj 1
Vikram Saxena 1
Giovanni Squillero 1
Viktor Lapinskii 1
Gustavo De Veciana 1
Francisco Fernández 1
Chihhung Liu 1
Syyen Kuo 1
Paul Feautrier 1
Yi Xu 1
Vincent Beroulle 1
Kele Shen 1
Zhi Li 1
Mehdi Kamal 1
Xiaobosharon Hu 1
Xiaofang Wang 1
Hsien Lee 1
Chen Li 1
Ricardo Jacobi 1
Zuoyuan Li 1
Kuohua Wang 1
Xinzhang Jia 1
Filipa Duarte 1
Jun Zhou 1
Tero Rissa 1
Chris Bleakley 1
Hidehiro Takata 1
Yosinori Watanabe 1
Renshen Wang 1
Anshul Kumar 1
Swarup Das 1
Laurent Freund 1
Michael Münch 1
Mohammad Foroozannejad 1
Raj Nadakuditi 1
Shashidhar Thakur 1
Adrian Ludwin 1
Tiempo Sas 1
Yuhao Zhu 1
Wenjong Fang 1
Michael Hsiao 1
James Li 1
Scott Little 1
David Bild 1
Gregory Bok 1
Gauthier Lafruit 1
Vincent Mooney 1
Matthew Gately 1
Claudio Sansoé 1
Piet Engelke 1
Sally McKee 1
Kevin Lepak 1
Keshab Parhi 1
Michael Mefenza 1
Jingwei Lu 1
Said Hamdioui 1
Adwait Gupte 1
Nathan Denny 1
J Chen 1
U Rovati 1
William Hung 1
Sumit Gupta 1
Ausif Mahmood 1
Stephen Cauley 1
Ying Hu 1
Seongook Jung 1
Stephen Edwards 1
Jackey Yan 1
Chris Chu 1
Yufu Zhang 1
Ali Pınar 1
Yongwen Wang 1
Dominik Erb 1
Matthias Sauer 1
Tobias Schubert 1
Minseok Kang 1
Baktash Boghrati 1
Hai Wang 1
Tim Nieberg 1
José Costa 1
Ying Tan 1
Haotse Chen 1
Hassan Salamy 1
J Lee 1
Giri Tiruvuri 1
Franc Breglez 1
Michael Gasteier 1
W Fuchs 1
Ismed Hartanto 1
Kuangchien Chen 1
Koen Danckaert 1
Steven Levitan 1
Noureddine Chabini 1
Hsiangyu Lu 1
Yiran Chen 1
Bernd Wurth 1
Ulf Schlichtmann 1
Olivier Sentieys 1
Pai Chou 1
Saket Gupta 1
Sartaj Sahni 1
Jiang Hu 1
Vilasita Kuntamukkala 1
Anjur Krishnakumar 1
Steve Tjiang 1
Nagu Dhanwada 1
Xiaoqing Wen 1
Andrew Cassidy 1
Hua Xiang 1
Arijit Mondal 1
Xiaoqing Yang 1
Yuliang Wu 1
Bert Geelen 1
Jaehyun Kim 1
Rajeev Rao 1
Dinesh Ramanathan 1
David Van Campenhout 1
Hussain Al-Asaad 1
Jonathan Martin 1
Rina Panigrahy 1
Hao Li 1
Juan Lanchares 1
Rajiv Gupta 1
Vijay Sundararajan 1
Christophe Bobda 1
Tianshi Chen 1
E Mariatos 1
Depei Qian 1
Hungsheng Chang 1
Salvador Mir 1
Gwan Choi 1
Dacheng Juan 1
Diana Marculescu 1
Dip Goswami 1
Linzhang Wang 1
Namita Sharma 1
Jean Desbarbieux 1
Emmanuelle Encrenaz 1
Safar Hatami 1
Ganghee Lee 1
Youtao Zhang 1
Giorgio Natale 1
Qiang Ma 1
Martin Wong 1
Sanghyun Park 1
Yongjoo Kim 1
Yahya Osais 1
Markus Seuring 1
Randall Geiger 1
Degang Chen 1
Yaolin Chang 1
Zheng Xu 1
Hamid Shojaei 1
Marc Geilen 1
Pinar Korkmaz 1
Yan Lin 1
Raymond Hoare 1
John Lockwood 1
Sabyasachi Das 1
Krste Asanović 1
Huaizhi Wu 1
Kundan Nepal 1
Francesco Zanini 1
Colin Jones 1
Sudarshan Bahukudumbi 1
Naifeng Jing 1
Santiago Mok 1
Chaohung Lu 1
Jarrod Roy 1
Nan Guan 1
Carlos González 1
Andrea Calimera 1
Thorlindur Thorolfsson 1
B Rau 1
Edwin Naroska 1
Mohammad Tehranipour 1
ZoltánÁdám Mann 1
Hsinhung Lin 1
Yoshiaki Fukui 1
YannRue Lin 1
Yihlang Li 1
Robert Brayton 1
Mohamed Zahran 1
Douglas Myers 1
Jonghee Youn 1
Yuan Yuan 1
Christian Hochberger 1
Alexander Weiss 1
Christian Panten 1
Yoan Lin 1
Unmesh Bordoloi 1
Petru Eles 1
Marcelo Johann 1
Qiuping Yi 1
Zili Shao 1
Dhiraj Pradhan 1
Kueichung Chang 1
Jihsheng Shen 1
Joachim Anlauf 1
Chaowen Tzeng 1
Sami Taktak 1
Jianli Zhuo 1
Xingguang Feng 1
Yiran Chen 1
Dongwoo Lee 1
Jonghee Yoon 1
Ahmed Abousamra 1
Dirk Niggemeyer 1
Bilge Akgul 1
Tsuangwei Chang 1
Pu Liu 1
Hyunggyu Lee 1
Janet Wang 1
Alexandro Baldassin 1
James Moscola 1
Young Cho 1
Sudarshan Srinivasan 1
Jaehyun Park 1
Concepcion Sanz 1
Sotirios Xydis 1
George Economakos 1
Nicholas Imbriglia 1
Giovanni De Micheli 1
Sherief Reda 1
Jamil Kawa 1
Dhananjay Kulkarni 1
Edwin Sha 1
Yehchi Chang 1
Gregor Goessler 1
Wei Hu 1
Chia Yen 1
Mohammed Elshoukry 1
Hongliang Chang 1
Luís Guerra E Silva 1
Shi Lin 1
Laurence Goodby 1
Ramin Fallahzadeh 1
Hongfei Wang 1
Fubing Mao 1
Hai Li 1
Hosoon Shin 1
Qihang Shi 1
Wei Zhong 1
Chuangwen Liu 1
Robert De Groote 1
Benny Åkesson 1
Yejyun Lin 1
Andrew Paverd 1
Artur Mrowca 1
Rajat Chakraborty 1
Di Zhu 1
Jeanine Cook 1
Saraju Mohanty 1
James Geraci 1
Priyank Gupta 1
Seetal Potluri 1
A Trinadh 1
Sebastien Guillet 1
Éric Rutten 1
Jean Diguet 1
Gary Tressler 1
Renyuan Zhang 1
Hyungjun Kim 1
Arseniy Vitkovskiy 1
Hamid Sarbazi-Azad 1
Steffen Peter 1
Changho Choi 1
Brentbyunghoon Kang 1
Joachim Keinert 1
Christian Haubelt 1
Gayatri Mehta 1
Nikhil Jayakumar 1
Ahmad Al-Yamani 1
Koen Van Eijk 1
Qin Zhao 1
Yentai Lai 1
Michele Malgeri 1
Maciej Ciesielski 1
Kumar Lalgudi 1
Marios Papaefthymiou 1
Songra Pan 1
Graeme Gange 1
Alan Hu 1
Xiaowei Li 1
Cristiana Bolchini 1
Frédéric Vivien 1
Chingyi Huang 1
Paul Chau 1
Adam Teman 1
Takeshi Yamamoto 1
Satoshi Nakano 1
John Lee 1
Rajarshi Mukherjee 1
Martha Pollack 1
Rupak Majumdar 1
Giacomo Marchetti 1
Samson Melamed 1
Pascal Meinerzhagen 1
Ramprasath S 1
Yichung Chen 1
Wei Zhang 1
Qing Dong 1
David Westwick 1
Renan Netto 1
Zhiliang Qian 1
Jian Kuang 1
Chuansheng Dong 1
Robert Elio 1
Sander Stuijk 1
Ludovic Apvrille 1
Renaud Pacalet 1
Li Tang 1
Peizhe Huang 1
Debashri Roy 1
Debasis Mitra 1
Yunfeng Yang 1
El Bourennane 1
Cong Xu 1
Shimeng Yu 1
Mustafa Baz 1
Koen De Bosschere 1
Zhongyi Jin 1
Curt Schurgers 1
Qiang Xu 1
Liling Hung 1
Kunal Ganeshpure 1
Katrina Lu 1
Kuanhsien Ho 1
Dimitris Nikolos 1
Jian Ma 1
Joost Katoen 1
Hernan Gutierrez-Vazquez 1
Sk Ali 1
Guilherme Ottoni 1
Min Zhao 1
Szuchi Wang 1
Zipeng Li 1
Xin Fu 1
Saeed Safari 1
Daming Zhang 1
Pei Zhang 1
Huazhong Yang 1
Shijie Wen 1
Jianchao Lu 1
David Kidd 1
Scott Van Sooy 1
Vijay Pitchumani 1
Ivan Hom 1
Joan Carletta 1
Mehrdad Nourani 1
Gert Goossens 1
Dirk Lanneer 1
Teemu Pitkänen 1
Hirofumi Shinohara 1
Marcus Schmitz 1
Bashir Al-Hashimi 1
Zhanglei Wang 1
Cécile Belleudy 1
John Pape 1
Xiaoke Qin 1
Jayanta Bhadra 1
Eren Kursun 1
Siobhán Clarke 1
Hongting Lin 1
Padmaraj Singh 1
ThuydM Le 1
Trongyen Lee 1
Stavros Hadjitheophanous 1
Yingchi Li 1
Mohammad Samavatian 1
Anand Raghunathan 1
Ran Wang 1
Joachim Falk 1
Stefan Gheorghita 1
Robert Johnson 1
Andreas Hansson 1
Prasenjit Basu 1
Sounil Biswas 1
Chiaheng Tu 1
Gustavo Tellez 1
Chengan Chien 1
Steven Wilton 1
Seongseok Seo 1
Rafael Moreno 1
Daler Rakhmatov 1
Mirko Loghi 1
Sri Parameswaran 1
Younghwan Park 1
Kazuhisa Ishizaka 1
Vijay D'Silva 1
Xrysovalantis Kavousianos 1
Jos Hulzink 1
Gang Chen 1
Werner Geurts 1
Johan Van Praet 1
Eduardo Pacheco 1
Hiroaki Suzuki 1
Wenyi Chen 1
Miquel Moretó 1
Sudip Poddar 1
Subhas Nandy 1
Joanna Ho 1
Jingweijia Tan 1
Richard Wong 1
Avi Ziv 1
Ruibing Lu 1
Sezer Gören 1
F Ferguson 1
Dian Zhou 1
John Emmert 1
Jinian Bian 1
Haikun Zhu 1
Arthur Yeh 1
Tadao Yamanaka 1
Moonjung Chung 1
Wolfgang Rosenstiel 1
Bita Gorjiara 1
Nader Bagherzadeh 1
Dmitri Maslov 1
Gang Chen 1
Jeroen Voeten 1
João Marques-Silva 1
TaiHung Liu 1
Chauchin Su 1
Chidamber Kulkarni 1
Abhijit Chatterjee 1
Tim Kong 1
Ra'ed Al-Dujaily 1
Raid Ayoub 1
Andy Yan 1
Jason Tong 1
Weikai Cheng 1
Steven Derrien 1
V Nair 1
Charalambos Ioannides 1
Fang Gong 1
Ashok Sudarsanam 1
Sehwan Kim 1
Jinjun Xiong 1
Peiyu Huang 1
Jie Gong 1
Les Walczowski 1
Dilvan Moreira 1
Xijiang Lin 1
Venkat Thanvantri 1
Andrew DeOrio 1
Antara Ain 1
Shangping Ren 1
J Van Eijnhoven 1
Alex Doboli 1
Hai Lin 1
Chungki Oh 1
Jingqing Mu 1
Mengchen Wu 1
Kiseok Chung 1
Richard Brown 1
Erik D'Hollander 1
Juergen Schloeffel 1
François Boyer 1
Michel Renovell 1
Sandip Das 1
Hamid Mahmoodi 1
Alex Kondratyev 1
Zhifang Li 1
Lihua Yue 1
Chengjuei Yu 1
YiHsin Wu 1
Etem Deniz 1
Kazutoshi Wakabayashi 1
Xuchu Hu 1
Chiennan Liu 1
Chiachun Tsai 1
J Ramanujam 1
Dipankar Sarkar 1
Ted Szymanski 1
Udo Kebschull 1
Bruno Lavigueur 1
Soumendu Bhattacharya 1
Min Xie 1
Nizar Dahir 1
Terrence Mak 1
Liang Shi 1
Steven Wilton 1
Jianhua Li 1
Muhammad Pasha 1
Mitchell Thornton 1
Alan Su 1
Mario Leung 1
Ryan Rakib 1
YuHsin Kuo 1
Junxia Ma 1
Gianpiero Cabodi 1
Debapriya Chatterjee 1
Yiding Han 1
Antonio Pérez 1
Praveen Murthy 1
Jay Brockman 1
Jiunlang Huang 1
Mohammed Khatib 1
Haruyuki Ohkuma 1
AnPing Wang 1
Pai Chou 1
Tiansi Hu 1
Robert Dick 1
YongHwan Kim 1
David Blaauw 1
ChunDa Du 1
ChoonYik Tang 1
Waichung Tang 1
Ganesh Gopalakrishnan 1
LiehMing Wu 1
Chuanjun Zhang 1
Mark Johnson 1
Alexios Birbas 1
Lu Sha 1
Yaping Lin 1
Mottaqiallah Taouil 1
Gang Chen 1
Reinhardt Euler 1
Yuzhen Niu 1
Bo Yao 1
Pingqiang Zhou 1
James Hoe 1
Bradley Carlson 1
Venkataramanan Balakrishnan 1
Shenghua Liu 1
Daniel Kroening 1
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Chris Bleakley 1
Bo Wang 1
Wonyong Sung 1
Amit Agarwal 1
Chunan Chen 1
Mehrdad Majzoobi 1
Duo Li 1
Michael Gester 1
Baoxian Zhao 1
Garng Huang 1
Farshad Firouzi 1
Tian Zhang 1
Fahimeh Jafari 1
Savithri Sundareswaran 1
Tomvander Aa 1
Hasan Arslan 1
Haibo Wang 1
Jimson Mathew 1
Alokika Dash 1
ShihCheng Tsai 1
Yongjin Ahn 1
Jean Rolt 1
Scott Chilstedt 1
Jinho Lee 1
Rohit Ramanujam 1
Bill Lin 1
Manoj Sachdev 1
Adit Singh 1
Turker Kuyel 1
Hsiangyun Cheng 1
Huahsin Yeh 1
Jinkyu Koo 1
Byunghyun Lee 1
D Van Campenhout 1
Trevor Mudge 1
Rick McGeer 1
Chunghsiang Lin 1
Miad Faezipour 1
Ilia Polian 1
Ken Kennedy 1
Yuzheng Ding 1
Sharat Prasad 1
David Whalley 1
ChuangYi Chiu 1
Ingjer Huang 1
Zhihua Zhou 1
Dennis Huang 1
Chungkuan Cheng 1
Dong Lee 1
Geert Deconinck 1
Hsueh Lu 1
Nobuhiro Tsuda 1
Donatella Sciuto 1
C Krishna 1
Yi Zou 1
Arijit Ghosh 1
Kaijie Wu 1
Xuan Guan 1
Wennai Cheng 1
Guoqiang Chen 1
Yunchih Chang 1
Michael Glaß 1
Waseem Ahmed 1
Zhiying Wang 1
Jieun Lim 1
Nagesh Lakshminarayana 1
Bernd Becker 1
Kamyiu Lam 1
Chiawei Lee 1
Bailey Miller 1
Brian Tagiku 1
Ashish Gupta 1
Hungming Chen 1
Christian Schulte 1
Jun Lu 1
Songbin Pan 1
Jinjun Xiong 1
Gungyu Pan 1
Kunlin Tsai 1
Chen Zhao 1
Michael Kishinevsky 1
Gustavo Neuberger 1
Siddharth Jain 1
Lakshmi Chakrapani 1
Angchih Hsieh 1
Olinto Furtado 1
Tim Tuan 1
Yongsoo Joo 1
Donghwa Shin 1
Moritz Schmid 1
Sandip Kundu 1
Ryan Cochran 1
Atsuto Hanami 1
Juyueh Lee 1
Weifeng He 1
Juan Clemente 1
Kuolin Peng 1
Steven Nowick 1
Denis Flandre 1
David Berner 1
Calin Ciordas 1
Stefan Pees 1
Heinrich Meyr 1
Hui Huang 1
Giuseppe Mangioni 1
Luc Bianco 1
Pradip Jha 1
Miron Abramovici 1
Ingrid Verbauwhede 1
Robert Rinker 1
Ugur Sezer 1
Chunkai Wang 1
Chingyu Chin 1
Dejun Mu 1
Mohit Tiwari 1
Xueliang Li 1
Bren Mochocki 1
Weiyu Tang 1
Pejman Lotfi-Kamran 1
Mohammad Hosseinabady 1
Robert Schreiber 1
Meenakshi Kaul 1
Steffen Schlueter 1
Zainalabedin Navabi 1
Alex OrailoĞLu 1
Chinghsuan Ho 1
Chunyao Wang 1
Laurence Pierre 1
V Kamakoti 1
Hai Zhou 1
Hu Chen 1
Anupama Subramaniam 1
Seonwook Kim 1
Seyed Miremadi 1
Ali Mirtar 1
Karel Heyse 1
Hongfei Wang 1
Zhuo Li 1
Jiunin Guo 1
Sandip Kundu 1
Milagros Férnandez 1
Prosenjit Gupta 1
Srinivas Patil 1
Shirshendu Das 1
Jan Allebach 1
Prasenjit Chakraborty 1
Ahish Somashekar 1
Yier Jin 1
Apostolos Kountouris 1
Elisenda Roca 1
Jun Ma 1
Yu Hu 1
Mingsong Chen 1
Mojtaba Ebrahimi 1
Youngsik Kim 1
Pallav Gupta 1
Takyung Kim 1
Arpit Joshi 1
Wei Dong 1
Fayez Mohamood 1
Wei Li 1
Carlos Llanos 1
Sanjukta Bhanja 1
Chris Chu 1
Jan Stuijt 1
Harmke De Groot 1
Ishwar Parulkar 1
Murli Tirumala 1
Xiuqiang He 1
Rei Akiyama 1
Mingxuan Yuan 1
Wenjian Luo 1
Talal Bonny 1
Kyoungwoo Lee 1
Shengde Wang 1
Andreas Raabe 1
Philipp Hartmann 1
George Viamontes 1
Ningde Xie 1
Tong Zhang 1
Tan Yan 1
Reiley Jeyapaul 1
Dana Price 1
Xiang Lu 1
Hyungjun Kim 1
Si Li 1
Fernanda De Lima 1
Román Hermida 1
Sungkyu Lim 1
Krishna Palem 1
Wei Wu 1
Eugenio Villar 1
Youngpyo Joo 1
Davide Bertozzi 1
Kishore Muchherla 1
Luiz Santos 1
Brett Brotherton 1
Panagiotis Manolios 1
Wilsin Gosti 1
Christopher Batten 1
Manuel Prieto 1
Yiwen Shi 1
R Iris Bahar 1
Shravan Muddasani 1
Srinivas Boppu 1
John Lee 1
Luca Benini 1
Hiroyuki Kondo 1
Zhe Feng 1
Zhigang Mao 1
Chien Liu 1
Nastaran Baradaran 1
David Bol 1
Paul Franzon 1
Mango Chao 1
Andreas Hoffmann 1
Scott Mahlke 1
Tong Xu 1
Stefan Holst 1
Michael Imhof 1
Navin Vemuri 1
Rajeev Jayaraman 1
Abusaleh Jabir 1
Ya Wang 1
Yue Zhao 1
Rickard Ewetz 1
Kenneth Stevens 1
Seungwon Kim 1
Taemin Lee 1
Hyunsun Park 1
Junwhan Ahn 1
Sparsh Mittal 1
Hyunok Oh 1
Suhaib Fahmy 1
Hanbin Hu 1
Shuwen Deng 1
Chienchih Chen 1
Nitin Chandrachoodan 1
Qingbo Wu 1
Dongha Jung 1
Dimin Niu 1
William Robinson 1
Lei Jiang 1
Brahim Al Farisi 1
James Harbin 1
Jingwei Lu 1
Chulhong Park 1
Qinke Wang 1
Sayantan Das 1
Michael Taylor 1
Yenchun Lin 1
SueHong Chow 1
Eddie Hung 1
Sudeep Pasricha 1
Karin Avnit 1
Yuru Hong 1
Yuwei Wu 1
Ganesh Gingade 1
Qixiao Liu 1
Philippe Grosse 1
Yves Durand 1
Owen Farell 1
Guoqing Chen 1
Liang Chen 1
Yongpan Liu 1
Song Jin 1
Sanghyeon Baeg 1
Weitsun Sun 1
Sungkyu Lim 1
Kunhyuk Kang 1
Jason Cheatham 1
Mauricio Ayala-Rincón 1
Michel Israel 1
Frederic Rousseau 1
Wooyoung Jang 1
Norbert Wehn 1
Hiroyuki Tomiyama 1
Anup Gangwar 1
Matin Hashemi 1
Benjamin Schafer 1
Haifeng Qian 1
Guilherme Flach 1
Yenlung Chen 1
Eamonn O'Toole 1
Marisa López-Vallejo 1
Fred Meyer 1
Subhrajit Bhattacharya 1
Gary Yeap 1
Qi Wang 1
Pierre Paulin 1
Chris Ostler 1
Gang Wang 1
Balakrishnan Iyer 1
Shyhjye Jou 1
Zhong Wang 1
Gokul Kandiraju 1
Xiao Liu 1
Eduardo Costa 1
Tayung Liu 1
Kerstin Eder 1
Sean Liu 1
Fatma Abouelella 1
Tom Davidson 1
Yumin Lee 1
Yifang Liu 1
Sylvain Clerc 1
Fabian Firmin 1
Xiongfei Liao 1
Antonio Garcia-Dopico 1
Adrian Nunez-Aldana 1
Yici Cai 1
Fangfang Li 1
Stefanus Mantik 1
Puneet Gupta 1
Hai Lin 1
Vissarion Ferentinos 1
Erwan Raffin 1
Dennis Sylvester 1
Mark Yeary 1

Affiliation Paper Counts
Nan-Tai Institute of Technology 1
Winbond Electronics Corporation 1
Kung Shan Institute of Technology 1
Macau University of Science and Technology 1
DoCoMo Communications Laboratories Europe GmbH 1
Yahoo Inc. 1
Institute for Information Industry Taiwan 1
Synopsys (India) Pvt. Ltd. 1
Mindspeed Technologies 1
FZI Research Computer Science Research Center Karlsruhe 1
Asyst Technologies, Inc. 1
Huawei Technologies Co., Ltd. 1
Zenasis Technologies, Inc. 1
Intel Technology India Pvt Ltd. 1
International Institute of Information Technology, Kolkata 1
Barcelona Supercomputing Center 1
Hitachi America, Ltd. 1
STMicroelectronics Ltd - Bristol 1
National Pingtung Institute of Commerce 1
Faraday Technology Corporation 1
Universite de Lyon 1
Intel Development Center, Israel 1
Toshiba America Research, Inc 1
Universite de Strasbourg 1
National Institute of Technology, Durgapur 1
Aalto University 1
Global Unichip 1
North China Electric Power University 1
Russian Academy of Sciences 1
Bahcesehir University 1
Catholic University of Pelotas 1
Microsoft Research 1
University of Potsdam 1
Beijing University of Chemical Technology 1
University of Virginia 1
Indian Institute of Technology, Kanpur 1
The University of Warwick 1
University of Central Florida 1
National Chi Nan University 1
Chongqing University 1
Ecole Centrale Marseille 1
National Taiwan Ocean University 1
Lancaster University 1
Oak Ridge National Laboratory 1
Missouri University of Science and Technology 1
University of Maryland, Baltimore County 1
The University of North Carolina at Chapel Hill 1
Northrop Grumman corporation 1
Jundi Shapur University of Dezful 1
Rensselaer Polytechnic Institute 1
Valparaiso University 1
University of Udine 1
Clarkson University 1
University of Nebraska - Lincoln 1
Royal Military College of Canada 1
School of Higher Technology - University of Quebec 1
San Francisco State University 1
Oracle Corporation 1
National Ilan University Taiwan 1
St. Louis University 1
Siemens AG 1
Daegu University 1
Wuhan University 1
Karlsruhe Institute of Technology, Campus South 1
Kent State University 1
Texas State University-San Marcos 1
Rutgers, The State University of New Jersey 1
Nortel Networks 1
Institute of Computing Technology Chinese Academy of Sciences 1
University of California System 1
Curtin University of Technology, Perth 1
McMaster University 1
Saint Francis Xavier University 1
University at Buffalo, State University of New York 1
University of Akron 1
North Dakota State University 1
University of Bridgeport 1
Miami University Oxford 1
Griffith University 1
Naval Postgraduate School 1
Concordia University, Montreal 1
Federal University of Santa Maria 1
University of Idaho 1
Gonzaga University 1
Texas Instruments (India) Ltd 1
Lahore University of Management Sciences 1
Hynix Semiconductor Inc. 1
Lebanese American University 1
P. A. College of Engineering 1
International Medical Equipment Collaborative 1
Indian Institute of Management Calcutta 1
University of Colorado at Boulder 1
Wilfrid Laurier University 1
Mississippi State University 1
Florida State University 1
France Telecom 1
University of Manchester 1
Universite de Bretagne-Sud 1
China National Petroleum Corporation 1
University of Ioannina 1
Fu Jen Catholic University 1
Centro de Investigaciones Energeticas, Medioambientales y Tecnologicas 1
Ecole Normale Superieure de Lyon 1
Google Inc. 1
Spanish National Research Council 1
City University of New York 1
Lawrence Berkeley National Laboratory 1
Thomson, SA 1
Cornell University 1
Commissariat a L'Energie Atomique CEA 1
University of Kansas 1
Colorado State University 1
Silicon Graphics, Inc. 1
Tampere University of Technology 1
University of St. Thomas, Minnesota 1
University of Kaiserslautern 1
Nanjing University of Science and Technology 1
Samsung Group 1
University of Kent 1
Auburn University 1
Oakland University 1
INRIA Rhone-Alpes 1
Qualcomm Incorporated 1
Czech Technical University in Prague 1
INRIA Institut National de Rechereche en Informatique et en Automatique 1
Oregon State University 1
Kwangwoon University 1
Indian Institute of Technology, Bombay 1
Providence University Taiwan 1
Oxford Brookes University 1
Kettering University 1
University of Southern California, Information Sciences Institute 1
North Carolina Agricultural and Technical State University 1
Robert Bosch GmbH 1
University of Trento 1
Chengdu University of Information Technology 1
Washington State University Tri-Cities 1
National Taipei University 1
University of New Brunswick 1
The University of North Carolina System 1
Vienna University of Technology 1
University of South Carolina 1
Sogang University 1
Bowling Green State University 1
Advanced Micro Devices, Inc. 1
LSI Corporation 1
Taiwan Semiconductor Manufacturing Company 1
Memorial University of Newfoundland 1
CSIC - Instituto de Investigacion en Inteligencia Artificial 1
Air Force Research Laboratory 1
State University of Rio Grande do Sul 1
United States Air Force Institute of Technology 1
Capital Normal University China 1
Sun Yat-Sen University 1
East China Normal University 1
National Key Laboratory for Parallel and Distributed Processing 2
Realtek Semiconductor Corp. 2
Avant Corporation 2
Villanova University 2
Virginia Commonwealth University 2
Polytechnic University - Brooklyn 2
Bar-Ilan University 2
Hefei University of Technology 2
Illinois Institute of Technology 2
Vanderbilt University 2
Mentor Graphics Corporation 2
Feng Chia University 2
University of Houston 2
CEA LETI 2
Sandia National Laboratories, New Mexico 2
Altera Corporation 2
CNRS Centre National de la Recherche Scientifique 2
Silesian Polytechnic University, Gliwice 2
King Fahd University of Petroleum and Minerals 2
Xilinx Inc. 2
Washington University in St. Louis 2
Kyushu University 2
IBM Research 2
National Sun Yat-Sen University Taiwan 2
Japan Advanced Institute of Science and Technology 2
National Taipei University of Technology 2
Beihang University 2
Brno University of Technology 2
University of Cantabria 2
University of Denver 2
University of Washington, Seattle 2
University of York 2
Radboud University Nijmegen 2
Michigan Technological University 2
University of Tubingen 2
Southern Methodist University 2
Washington State University Pullman 2
Wright State University 2
George Mason University 2
Technical University of Dresden 2
Binghamton University State University of New York 2
University of Twente 2
Technical University of Crete 2
Osaka University 2
Southern Illinois University 2
Open University of the Netherlands 2
University of Ferrara 2
University of Lethbridge 2
University of Southampton 2
University of Tokyo 2
Xidian University 2
Nokia Corporation 2
Universidad Autonoma de Madrid 2
University of Oxford 2
Institute for Research in IT and Random Systems 2
NXP Semiconductors 2
Lund University 2
National Semiconductor Corporation 2
Columbia University 2
Universite d' Evry Val d'Essonne 2
Infineon Technologies AG 2
Democritus University of Thrace 2
University of Queensland 2
Michigan State University 2
Indian Institute of Technology Roorkee 2
American University of Beirut 2
Cyprus University of Technology 2
Case Western Reserve University 3
Catholic University of Louvain, Louvain-la-Neuve 3
Electronics Telecommunication Research Institute 3
University of Victoria 3
University of Texas at San Antonio 3
University of Arkansas - Fayetteville 3
Korea University 3
Bogazici University 3
Delft University of Technology 3
Kitakyushu University 3
The University of Hong Kong 3
University of Catania 3
University of Dublin, Trinity College 3
Bilkent University 3
Boston University 3
Universite de Bretagne Occidentale 3
Hewlett-Packard Inc. 3
Tunghai University 3
University of New Orleans 3
Portland State University 3
University of Brasilia 3
Stony Brook University 3
University of Melbourne 3
University of Pisa 3
Cisco Systems 3
Budapest University of Technology and Economics 3
University of Oklahoma 3
Northeastern University China 3
University of Texas System 3
Hunan University 3
University of Seville 3
University of Cyprus 3
Laboratoire Traitement et Communication de l'Information 3
NVIDIA 3
Sunchon National University 4
National Technical University of Athens 4
TIMA Laboratoire 4
University of Peloponnese 4
Northwestern Polytechnical University China 4
University College Dublin 4
Motorola Austin 4
Louisiana State University 4
City University of Hong Kong 4
Peking University 4
Nanhua University Taiwan 4
Canakkale 18th March University 4
Politecnico di Milano 4
Motorola 4
Hanyang University 4
Swiss Federal Institute of Technology, Zurich 4
Microsoft Corporation 4
IBM Austin Research Laboratory 4
University of Milan 4
Syracuse University 4
Universite de Rennes 1 4
Pohang University of Science and Technology 4
University of Dortmund 4
Macronix International Co 4
Laboratoire des Sciences et Techniques de l'Information, de la Communication et de la Connaissance 4
Western Michigan University 5
Royal Institute of Technology 5
University of Calgary 5
Zhejiang University 5
Instituto Superior Tecnico 5
Rice University 5
Universitat Politecnica de Catalunya 5
Chung Hua University 5
Technical University of Darmstadt 5
Norwegian University of Science and Technology 5
Texas Instruments 5
University of Tennessee Space Institute 5
Philips Research 5
RWTH Aachen University 5
University of Bristol 5
New York University 5
University of North Texas 5
Agilent Technologies 5
University of Cincinnati 5
University of New South Wales 5
Technical University of Madrid 5
IBM Zurich Research Laboratory 5
Kyushu Institute of Technology 5
Nanjing University 5
Fujitsu America, Inc. 5
New York University Abu Dhabi 5
Instituto de Engenharia de Sistemas e Computadores Investigacao e Desenvolvimento em Lisboa 6
North Carolina State University 6
University of Illinois 6
Hong Kong University of Science and Technology 6
Fudan University 6
Indian Institute of Technology, Guwahati 6
Brown University 6
University of California, Davis 6
Holst Centre 6
Industrial Technology Research Institute of Taiwan 6
STMicroelectronics 6
Swiss Federal Institute of Technology, Lausanne 6
Northeastern University 6
University of Verona 6
Universite Nice Sophia Antipolis 6
Magma Design Automation, Inc. 6
Nebrija University 6
Universidade de Lisboa 6
University of Minnesota System 7
Linkoping University 7
HP Labs 7
National University of Singapore 7
IBM Thomas J. Watson Research Center 7
National Chung Hsing University 7
Polytechnic School of Montreal 7
Massachusetts Institute of Technology 7
Technion - Israel Institute of Technology 7
National Taiwan University of Science and Technology 7
State University of Campinas 7
Utah State University 7
Iowa State University 8
University of Electronic Science and Technology of China 8
Nanyang Technological University 8
Northwestern University 8
Federal University of Santa Catarina 8
IBM, USA 8
University of California, Santa Cruz 8
University of Bologna 8
University of Wisconsin Madison 8
Indian Institute of Technology, Delhi 8
Karlsruhe Institute of Technology 8
Ulsan National Institute of Science and Technology 8
University of Michigan 9
McGill University 9
University of Auckland 9
University of Bonn 9
University of Texas at Dallas 9
University of Montreal 9
Stanford University 9
Drexel University 9
Fuzhou University 9
Technical University of Munich 9
Freescale Semiconductor 9
University of Connecticut 9
National Central University Taiwan 9
University of Freiburg 9
University of Illinois at Chicago 9
The University of British Columbia 10
University of Stuttgart 10
NEC Laboratories America, Inc. 10
University of Iowa 10
Indian Statistical Institute, Kolkata 10
Shanghai Jiaotong University 10
University of Utah 10
Broadcom Corporation 10
Sharif University of Technology 10
University of Minnesota Twin Cities 10
Southern Illinois University at Carbondale 10
Chung Yuan Christian University 10
NEC Corporation 10
Princeton University 11
Yuan Ze University 11
University of Massachusetts Amherst 11
Imperial College London 11
Indian Institute of Technology, Madras 11
Samsung Electronics Co. Ltd. 12
Federal University of Rio Grande do Sul 12
University of Florida 12
University of Waterloo 12
Korea Advanced Institute of Science & Technology 12
Universite Grenoble Alpes 12
University of Notre Dame 13
National University of Defense Technology China 13
University of Patras 13
University of South Florida Tampa 14
Academia Sinica Taiwan 14
University of Science and Technology of China 14
Catholic University of Leuven, Leuven 14
Complutense University of Madrid 14
National Chung Cheng University 15
Hong Kong Polytechnic University 15
University of Tehran 15
University of California, Berkeley 15
Renesas Electronics Corporation 15
Chinese Academy of Sciences 16
University of Arizona 17
University of Erlangen-Nuremberg 18
Cadence Design Systems 18
University of Southern California 18
Ghent University 18
Pennsylvania State University 20
Arizona State University 20
Georgia Institute of Technology 20
Virginia Tech 20
University of Illinois at Urbana-Champaign 21
University of California, Santa Barbara 21
Tsinghua University 24
National Cheng Kung University 25
University of Maryland 26
Synopsys Incorporated 28
Eindhoven University of Technology 28
Chinese University of Hong Kong 30
Duke University 31
University Michigan Ann Arbor 32
Polytechnic Institute of Turin 34
Intel Corporation 34
Interuniversity Micro-Electronics Center at Leuven 34
University of Texas at Austin 35
Carnegie Mellon University 40
Purdue University 41
University of Pittsburgh 41
National Taiwan University 42
University of California, San Diego 43
University of California, Riverside 44
National Chiao Tung University Taiwan 50
Texas A and M University 51
Indian Institute of Technology, Kharagpur 55
University of California, Irvine 63
University of California, Los Angeles 65
Seoul National University 71
National Tsing Hua University 71

ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special Section of IDEA: Integrating Dataflow, Embedded Computing, and Architecture
Archive


2017
Volume 22 Issue 2, March 2017 Special Section of IDEA: Integrating Dataflow, Embedded Computing, and Architecture
Volume 22 Issue 3, March 2017  Issue-in-Progress

2016
Volume 22 Issue 1, December 2016
Volume 21 Issue 4, September 2016
Volume 21 Issue 3, July 2016 Special Section on New Physical Design Techniques for the Next Generation Integration Technology and Regular Papers
Volume 21 Issue 2, January 2016

2015
Volume 21 Issue 1, November 2015
Volume 20 Issue 4, September 2015 Special Issue on Reliable, Resilient, and Robust Design of Circuits and Systems
Volume 20 Issue 3, June 2015
Volume 20 Issue 2, February 2015

2014
Volume 20 Issue 1, November 2014
Volume 19 Issue 4, August 2014
Volume 19 Issue 3, June 2014
Volume 19 Issue 2, March 2014

2013
Volume 19 Issue 1, December 2013
Volume 18 Issue 4, October 2013 Special Section on Networks on Chip: Architecture, Tools, and Methodologies
Volume 18 Issue 3, July 2013
Volume 18 Issue 2, March 2013
Volume 18 Issue 1, January 2013 Special section on adaptive power management for energy and temperature-aware computing systems

2012
Volume 17 Issue 4, October 2012
Volume 17 Issue 3, June 2012 Special section on verification challenges in the concurrent world
Volume 17 Issue 2, April 2012
Volume 17 Issue 1, January 2012

2011
Volume 16 Issue 4, October 2011
Volume 16 Issue 3, June 2011
Volume 16 Issue 2, March 2011

2010
Volume 16 Issue 1, November 2010
Volume 15 Issue 4, September 2010
Volume 15 Issue 3, May 2010
Volume 15 Issue 2, February 2010

2009
Volume 15 Issue 1, December 2009
Volume 14 Issue 4, August 2009
Volume 14 Issue 3, May 2009
Volume 14 Issue 2, March 2009
Volume 14 Issue 1, January 2009

2008
Volume 13 Issue 4, September 2008
Volume 13 Issue 3, July 2008
Volume 13 Issue 2, April 2008
Volume 13 Issue 1, January 2008

2007
Volume 12 Issue 4, September 2007
Volume 12 Issue 3, August 2007
Volume 12 Issue 2, April 2007
Volume 12 Issue 1, January 2007

2006
Volume 11 Issue 4, October 2006
Volume 11 Issue 3, July 2006
Volume 11 Issue 2, April 2006
Volume 11 Issue 1, January 2006

2005
Volume 10 Issue 4, October 2005
Volume 10 Issue 3, July 2005
Volume 10 Issue 2, April 2005
Volume 10 Issue 1, January 2005

2004
Volume 9 Issue 4, October 2004
Volume 9 Issue 3, July 2004
Volume 9 Issue 2, April 2004
Volume 9 Issue 1, January 2004

2003
Volume 8 Issue 4, October 2003
Volume 8 Issue 3, July 2003
Volume 8 Issue 2, April 2003
Volume 8 Issue 1, January 2003

2002
Volume 7 Issue 4, October 2002
Volume 7 Issue 3, July 2002
Volume 7 Issue 2, April 2002
Volume 7 Issue 1, January 2002

2001
Volume 6 Issue 4, October 2001
Volume 6 Issue 3, July 2001
Volume 6 Issue 2, April 2001
Volume 6 Issue 1, Jan. 2001

2000
Volume 5 Issue 4, Oct. 2000
Volume 5 Issue 3, July 2000
Volume 5 Issue 2, April 2000
Volume 5 Issue 1, Jan. 2000

1999
Volume 4 Issue 4, Oct. 1999
Volume 4 Issue 3, July 1999
Volume 4 Issue 2, April 1999
Volume 4 Issue 1, Jan. 1999

1998
Volume 3 Issue 4, Oct. 1998
Volume 3 Issue 3, July 1998
Volume 3 Issue 2, April 1998
Volume 3 Issue 1, Jan. 1998

1997
Volume 2 Issue 4, Oct. 1997
Volume 2 Issue 3, July 1997
Volume 2 Issue 2, April 1997
Volume 2 Issue 1, Jan. 1997

1996
Volume 1 Issue 4, Oct. 1996
Volume 1 Issue 3, July 1996
Volume 1 Issue 2, April 1996
Volume 1 Issue 1, Jan. 1996
 
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